build/vhd2v_converter: Add GHDL synth woraround.
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@ -143,6 +143,7 @@ class VHD2VConverter(Module):
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# more than one instance of this core? rename top entity to avoid conflict
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# more than one instance of this core? rename top entity to avoid conflict
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if inst_name != self._top_entity:
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if inst_name != self._top_entity:
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tools.replace_in_file(verilog_out, f"module {self._top_entity}", f"module {inst_name}")
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tools.replace_in_file(verilog_out, f"module {self._top_entity}", f"module {inst_name}")
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tools.replace_in_file(verilog_out, f"\\", f"ghdl_") # FIXME: GHDL synth workaround, improve.
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self._platform.add_source(verilog_out)
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self._platform.add_source(verilog_out)
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if self._add_instance:
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if self._add_instance:
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