cpu/rocket: access PLIC registers via pointer dereference
Since the PLIC is internal to Rocket, access its registers directly via pointer dereference, rather than through the LiteX CSR Bus accessors (which assume subregister slicing, and are therefore inappropriate for registers NOT accessed over the LiteX CSR Bus). Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
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@ -16,11 +16,11 @@ void plic_init(void)
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// priorities for interrupt pins 1..4
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// priorities for interrupt pins 1..4
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for (i = 1; i <= 4; i++)
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for (i = 1; i <= 4; i++)
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csr_writel(1, PLIC_BASE + 4*i);
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*((unsigned int *)PLIC_BASE + i) = 1;
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// enable interrupt pins 1..4
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// enable interrupt pins 1..4
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csr_writel(0xf << 1, PLIC_ENABLED);
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*((unsigned int *)PLIC_ENABLED) = 0xf << 1;
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// set priority threshold to 0 (any priority > 0 triggers interrupt)
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// set priority threshold to 0 (any priority > 0 triggers interrupt)
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csr_writel(0, PLIC_THRSHLD);
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*((unsigned int *)PLIC_THRSHLD) = 0;
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}
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}
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void isr(void);
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void isr(void);
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@ -28,7 +28,7 @@ void isr(void)
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{
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{
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unsigned int claim;
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unsigned int claim;
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while ((claim = csr_readl(PLIC_CLAIM))) {
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while ((claim = *((unsigned int *)PLIC_CLAIM))) {
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switch (claim - 1) {
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switch (claim - 1) {
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case UART_INTERRUPT:
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case UART_INTERRUPT:
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uart_isr();
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uart_isr();
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@ -45,7 +45,7 @@ void isr(void)
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printf("###########################\n\n");
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printf("###########################\n\n");
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break;
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break;
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}
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}
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csr_writel(claim, PLIC_CLAIM);
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*((unsigned int *)PLIC_CLAIM) = claim;
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}
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}
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}
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}
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#else
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#else
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@ -111,7 +111,7 @@ static inline unsigned int irq_getmask(void)
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asm volatile ("csrr %0, %1" : "=r"(mask) : "i"(CSR_IRQ_MASK));
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asm volatile ("csrr %0, %1" : "=r"(mask) : "i"(CSR_IRQ_MASK));
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return mask;
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return mask;
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#elif defined (__rocket__)
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#elif defined (__rocket__)
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return csr_readl(PLIC_ENABLED) >> 1;
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return *((unsigned int *)PLIC_ENABLED) >> 1;
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#elif defined (__microwatt__)
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#elif defined (__microwatt__)
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return 0; // FIXME
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return 0; // FIXME
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#else
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#else
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@ -134,7 +134,7 @@ static inline void irq_setmask(unsigned int mask)
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#elif defined (__minerva__)
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#elif defined (__minerva__)
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asm volatile ("csrw %0, %1" :: "i"(CSR_IRQ_MASK), "r"(mask));
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asm volatile ("csrw %0, %1" :: "i"(CSR_IRQ_MASK), "r"(mask));
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#elif defined (__rocket__)
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#elif defined (__rocket__)
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csr_writel(mask << 1, PLIC_ENABLED);
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*((unsigned int *)PLIC_ENABLED) = mask << 1;
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#elif defined (__microwatt__)
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#elif defined (__microwatt__)
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// FIXME
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// FIXME
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#else
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#else
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@ -161,7 +161,7 @@ static inline unsigned int irq_pending(void)
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asm volatile ("csrr %0, %1" : "=r"(pending) : "i"(CSR_IRQ_PENDING));
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asm volatile ("csrr %0, %1" : "=r"(pending) : "i"(CSR_IRQ_PENDING));
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return pending;
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return pending;
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#elif defined (__rocket__)
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#elif defined (__rocket__)
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return csr_readl(PLIC_PENDING) >> 1;
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return *((unsigned int *)PLIC_PENDING) >> 1;
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#elif defined (__microwatt__)
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#elif defined (__microwatt__)
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return 0; // FIXME
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return 0; // FIXME
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#else
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#else
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