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cpu/rocket: access PLIC registers via pointer dereference 

Since the PLIC is internal to Rocket, access its registers
directly via pointer dereference, rather than through the
LiteX CSR Bus accessors (which assume subregister slicing,
and are therefore inappropriate for registers NOT accessed
over the LiteX CSR Bus).

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
This commit is contained in:
Gabriel Somlo 2019-12-21 12:59:19 -05:00
parent 0e46913d52
commit b6818c205e
2 changed files with 8 additions and 8 deletions
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10
litex/soc/software/bios/isr.c
View File

@ -16,11 +16,11 @@ void plic_init(void)
// priorities for interrupt pins 1..4
for (i = 1; i <= 4; i++)
csr_writel(1, PLIC_BASE + 4*i);
*((unsigned int *)PLIC_BASE + i) = 1;
// enable interrupt pins 1..4
csr_writel(0xf << 1, PLIC_ENABLED);
*((unsigned int *)PLIC_ENABLED) = 0xf << 1;
// set priority threshold to 0 (any priority > 0 triggers interrupt)
csr_writel(0, PLIC_THRSHLD);
*((unsigned int *)PLIC_THRSHLD) = 0;
}
void isr(void);
@ -28,7 +28,7 @@ void isr(void)
{
unsigned int claim;
while ((claim = csr_readl(PLIC_CLAIM))) {
while ((claim = *((unsigned int *)PLIC_CLAIM))) {
switch (claim - 1) {
case UART_INTERRUPT:
uart_isr();
@ -45,7 +45,7 @@ void isr(void)
printf("###########################\n\n");
break;
}
csr_writel(claim, PLIC_CLAIM);
*((unsigned int *)PLIC_CLAIM) = claim;
}
}
#else

6
litex/soc/software/include/base/irq.h
View File

@ -111,7 +111,7 @@ static inline unsigned int irq_getmask(void)
asm volatile ("csrr %0, %1" : "=r"(mask) : "i"(CSR_IRQ_MASK));
return mask;
#elif defined (__rocket__)
return csr_readl(PLIC_ENABLED) >> 1;
return *((unsigned int *)PLIC_ENABLED) >> 1;
#elif defined (__microwatt__)
return 0; // FIXME
#else
@ -134,7 +134,7 @@ static inline void irq_setmask(unsigned int mask)
#elif defined (__minerva__)
asm volatile ("csrw %0, %1" :: "i"(CSR_IRQ_MASK), "r"(mask));
#elif defined (__rocket__)
csr_writel(mask << 1, PLIC_ENABLED);
*((unsigned int *)PLIC_ENABLED) = mask << 1;
#elif defined (__microwatt__)
// FIXME
#else
@ -161,7 +161,7 @@ static inline unsigned int irq_pending(void)
asm volatile ("csrr %0, %1" : "=r"(pending) : "i"(CSR_IRQ_PENDING));
return pending;
#elif defined (__rocket__)
return csr_readl(PLIC_PENDING) >> 1;
return *((unsigned int *)PLIC_PENDING) >> 1;
#elif defined (__microwatt__)
return 0; // FIXME
#else