Merge pull request #154 from daveshah1/yosys_xilinx_edif
build/xilinx: Update Yosys write_edif parameters
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b682dacdd7
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@ -265,7 +265,7 @@ setattr -set keep 1 a:async_reg=true
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synth_xilinx -top top
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synth_xilinx -top top
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write_edif -attrprop {build_name}.edif
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write_edif -pvector bra -attrprop {build_name}.edif
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""".format(build_name=build_name)
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""".format(build_name=build_name)
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ys_name = build_name + ".ys"
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ys_name = build_name + ".ys"
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