software/bios/memtest: add data bus test (0xAAAAAAAA, 0x55555555) on a small portion of the test zone.
we now need to add another random addressing test to avoid linear access on L2 cache
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@ -424,6 +424,9 @@ int sdrlevel(void)
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#define TEST_SIZE (2*1024*1024)
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#define ONEZERO 0xAAAAAAAA
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#define ZEROONE 0x55555555
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int memtest_silent(void)
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{
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volatile unsigned int *array = (unsigned int *)SDRAM_BASE;
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@ -431,15 +434,26 @@ int memtest_silent(void)
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unsigned int prv;
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unsigned int error_cnt;
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for(i=0;i<TEST_SIZE/4;i++) {
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array[i] = 0x5A5A5A5A;
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/* test data bus */
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for(i=0;i<128;i++) {
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array[i] = ONEZERO;
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}
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error_cnt = 0;
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for(i=0;i<TEST_SIZE/4;i++) {
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if(array[i] != 0x5A5A5A5A)
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for(i=0;i<128;i++) {
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if(array[i] != ONEZERO)
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error_cnt++;
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}
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for(i=0;i<128;i++) {
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array[i] = ZEROONE;
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}
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error_cnt = 0;
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for(i=0;i<128;i++) {
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if(array[i] != ZEROONE)
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error_cnt++;
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}
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/* test random data */
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prv = 0;
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for(i=0;i<TEST_SIZE/4;i++) {
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prv = 1664525*prv + 1013904223;
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