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software/bios/memtest: add data bus test (0xAAAAAAAA, 0x55555555) on a small portion of the test zone. 

we now need to add another random addressing test to avoid linear access on L2 cache
This commit is contained in:
Florent Kermarrec 2015-03-21 19:26:10 +01:00
parent c60d99583d
commit b75e4b237d
1 changed files with 18 additions and 4 deletions
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22
software/bios/sdram.c
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@ -424,6 +424,9 @@ int sdrlevel(void)
#define TEST_SIZE (2*1024*1024) #define TEST_SIZE (2*1024*1024)
#define ONEZERO 0xAAAAAAAA
#define ZEROONE 0x55555555
int memtest_silent(void) int memtest_silent(void)
{ {
volatile unsigned int *array = (unsigned int *)SDRAM_BASE; volatile unsigned int *array = (unsigned int *)SDRAM_BASE;
@ -431,15 +434,26 @@ int memtest_silent(void)
unsigned int prv; unsigned int prv;
unsigned int error_cnt; unsigned int error_cnt;
for(i=0;i<TEST_SIZE/4;i++) { /* test data bus */
array[i] = 0x5A5A5A5A; for(i=0;i<128;i++) {
array[i] = ONEZERO;
} }
error_cnt = 0; error_cnt = 0;
for(i=0;i<TEST_SIZE/4;i++) { for(i=0;i<128;i++) {
if(array[i] != 0x5A5A5A5A) if(array[i] != ONEZERO)
error_cnt++; error_cnt++;
} }
for(i=0;i<128;i++) {
array[i] = ZEROONE;
}
error_cnt = 0;
for(i=0;i<128;i++) {
if(array[i] != ZEROONE)
error_cnt++;
}
/* test random data */
prv = 0; prv = 0;
for(i=0;i<TEST_SIZE/4;i++) { for(i=0;i<TEST_SIZE/4;i++) {
prv = 1664525*prv + 1013904223; prv = 1664525*prv + 1013904223;