build/efinix: Fix VHDL support.
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@ -191,11 +191,10 @@ def _build_xml(family, device, timing_model, build_name, sources):
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# Add Design Sources.
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for filename, language, library in sources:
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if ".vh" not in filename:
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et.SubElement(design_info, "efx:design_file", {
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"name" : filename,
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"version" : "default",
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"library" : "default",
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"library" : "default" if ".vh" not in filename else library,
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})
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# Add Timing Constraints.
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