fhdl: compact Instance syntax

This commit is contained in:
Sebastien Bourdeauducq 2013-07-25 20:34:19 +02:00
parent b7ed19c6c5
commit b96eb339af
3 changed files with 25 additions and 15 deletions

View File

@ -139,10 +139,10 @@ A triplet (O, OE, I) of one-way signals defining a tri-state I/O port is represe
The object that can be used in as a module special is ``Tristate``, and it behaves exactly like an instance of a tri-state I/O buffer that would be defined as follows: :: The object that can be used in as a module special is ``Tristate``, and it behaves exactly like an instance of a tri-state I/O buffer that would be defined as follows: ::
Instance("Tristate", Instance("Tristate",
Instance.Inout("target", target), io_target=target,
Instance.Input("o", o), i_o=o,
Instance.Input("oe", oe), i_oe=oe,
Instance.Output("i", i) o_i=i
) )
Signals ``target``, ``o`` and ``i`` can have any width, while ``oe`` is 1-bit wide. The ``target`` signal should go to a port and not be used elsewhere in the design. Like modern FPGA architectures, Migen does not support internal tri-states. Signals ``target``, ``o`` and ``i`` can have any width, while ``oe`` is 1-bit wide. The ``target`` signal should go to a port and not be used elsewhere in the design. Like modern FPGA architectures, Migen does not support internal tri-states.

View File

@ -21,6 +21,6 @@ class Example(Module):
ina = Array(Signal() for a in range(dx)) ina = Array(Signal() for a in range(dx))
outa = Array(Signal() for a in range(dy)) outa = Array(Signal() for a in range(dy))
self.specials += Instance("test", Instance.Output("O", outa[y]), Instance.Input("I", ina[x])) self.specials += Instance("test", o_O=outa[y], i_I=ina[x])
print(verilog.convert(Example())) print(verilog.convert(Example()))

View File

@ -1,3 +1,5 @@
from operator import itemgetter
from migen.fhdl.structure import * from migen.fhdl.structure import *
from migen.fhdl.size import bits_for, value_bits_sign from migen.fhdl.size import bits_for, value_bits_sign
from migen.fhdl.tools import * from migen.fhdl.tools import *
@ -68,15 +70,6 @@ class TSTriple:
return Tristate(target, self.o, self.oe, self.i) return Tristate(target, self.o, self.oe, self.i)
class Instance(Special): class Instance(Special):
def __init__(self, of, *items, name=""):
Special.__init__(self)
self.of = of
if name:
self.name_override = name
else:
self.name_override = of
self.items = items
class _IO: class _IO:
def __init__(self, name, expr=None): def __init__(self, name, expr=None):
self.name = name self.name = name
@ -89,11 +82,28 @@ class Instance(Special):
pass pass
class InOut(_IO): class InOut(_IO):
pass pass
class Parameter: class Parameter:
def __init__(self, name, value): def __init__(self, name, value):
self.name = name self.name = name
self.value = value self.value = value
def __init__(self, of, *items, name="", **kwargs):
Special.__init__(self)
self.of = of
if name:
self.name_override = name
else:
self.name_override = of
self.items = list(items)
for k, v in sorted(kwargs.items(), key=itemgetter(1)):
item_type, item_name = k.split("_", maxsplit=1)
item_class = {
"i": Instance.Input,
"o": Instance.Output,
"io": Instance.InOut,
"p": Instance.Parameter
}[item_type]
self.items.append(item_class(item_name, v))
def get_io(self, name): def get_io(self, name):
for item in self.items: for item in self.items: