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Merge pull request #2075 from trabucayre/efinix_clkinput_signal 

build/efinix/common.py: ClkInput: added ClockSignal support
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enjoy-digital 2024-09-19 11:59:06 +02:00 committed by GitHub
parent 033ec13f08 f1e1f3530e
commit baff4c69fe
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2 changed files with 27 additions and 3 deletions
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19
litex/build/efinix/common.py
View File

@ -66,19 +66,34 @@ class EfinixAsyncResetSynchronizer:
# Efinix Clk Input ---------------------------------------------------------------------------------
class EfinixClkInputImpl(Module):
n = 0
def __init__(self, platform, i, o):
o_clk = platform.add_iface_io(o) # FIXME.
self.name = f"clk_input{self.n}"
if isinstance(o, Signal):
clk_out_name = f"{o.name_override}{self.name}_clk"
platform.add_extension([(clk_out_name, 0, Pins(1))])
platform.toolchain.excluded_ios.append(clk_out_name)
clk_out = platform.request(clk_out_name)
platform.clks[o.name_override] = clk_out_name
else:
clk_out = platform.add_iface_io(o) # FIXME.
clk_out_name = platform.get_pin_name(clk_out)
block = {
"type" : "GPIO",
"size" : 1,
"location" : platform.get_pin_location(i)[0],
"properties" : platform.get_pin_properties(i),
"name" : platform.get_pin_name(o_clk),
"name" : clk_out_name,
"mode" : "INPUT_CLK",
}
platform.toolchain.ifacewriter.blocks.append(block)
platform.toolchain.excluded_ios.append(i)
if isinstance(o, Signal):
self.comb += o.eq(clk_out)
o = clk_out
EfinixClkInputImpl.n += 1 # FIXME: Improve.
class EfinixClkInput(Module):
@staticmethod

11
litex/build/efinix/ifacewriter.py
View File

@ -212,8 +212,17 @@ design.create("{2}", "{3}", "./../gateware", overwrite=True)
for i, pad in enumerate(block["location"]):
cmd += f'design.assign_pkg_pin("{name}[{i}]","{pad}")\n'
if "in_reg" in block:
in_clk_pin = block["in_clk_pin"]
if isinstance(in_clk_pin, ClockSignal):
# Try to find cd name
in_clk_pin_name = self.platform.clks.get(in_clk_pin.cd, None)
# If not found cd name has been updated with "_clk" as suffix.
if in_clk_pin_name is None:
in_clk_pin_name = self.platform.clks.get(in_clk_pin.cd + "_clk")
in_clk_pin = in_clk_pin_name
cmd += f'design.set_property("{name}","IN_REG","{block["in_reg"]}")\n'
cmd += f'design.set_property("{name}","IN_CLK_PIN","{block["in_clk_pin"]}")\n'
cmd += f'design.set_property("{name}","IN_CLK_PIN","{in_clk_pin}")\n'
if "in_delay" in block:
cmd += f'design.set_property("{name}","INDELAY","{block["in_delay"]}")\n'
if prop: