Merge pull request #627 from gsomlo/gls-dma-addr-64
RFC: cores/dma, liblitesdcard/sdcard: use 64 bits for dma base address
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commit
bb7f33434e
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@ -72,7 +72,7 @@ class WishboneDMAReader(Module, AutoCSR):
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self.add_csr()
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self.add_csr()
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def add_csr(self):
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def add_csr(self):
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self._base = CSRStorage(32)
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self._base = CSRStorage(64)
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self._length = CSRStorage(32)
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self._length = CSRStorage(32)
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self._enable = CSRStorage()
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self._enable = CSRStorage()
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self._done = CSRStatus()
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self._done = CSRStatus()
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@ -158,7 +158,7 @@ class WishboneDMAWriter(Module, AutoCSR):
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self._sink = self.sink
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self._sink = self.sink
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self.sink = stream.Endpoint([("data", self.bus.data_width)])
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self.sink = stream.Endpoint([("data", self.bus.data_width)])
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self._base = CSRStorage(32)
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self._base = CSRStorage(64)
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self._length = CSRStorage(32)
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self._length = CSRStorage(32)
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self._enable = CSRStorage()
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self._enable = CSRStorage()
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self._done = CSRStatus()
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self._done = CSRStatus()
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@ -561,7 +561,7 @@ void sdcard_read(uint32_t sector, uint32_t count, uint8_t* buf)
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{
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{
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/* Initialize DMA Writer */
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/* Initialize DMA Writer */
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sdblock2mem_dma_enable_write(0);
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sdblock2mem_dma_enable_write(0);
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sdblock2mem_dma_base_write((uint32_t) buf);
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sdblock2mem_dma_base_write((uint64_t) buf);
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sdblock2mem_dma_length_write(512*count);
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sdblock2mem_dma_length_write(512*count);
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sdblock2mem_dma_enable_write(1);
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sdblock2mem_dma_enable_write(1);
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@ -594,7 +594,7 @@ void sdcard_write(uint32_t sector, uint32_t count, uint8_t* buf)
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while (count--) {
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while (count--) {
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/* Initialize DMA Reader */
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/* Initialize DMA Reader */
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sdmem2block_dma_enable_write(0);
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sdmem2block_dma_enable_write(0);
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sdmem2block_dma_base_write((uint32_t) buf);
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sdmem2block_dma_base_write((uint64_t) buf);
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sdmem2block_dma_length_write(512);
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sdmem2block_dma_length_write(512);
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sdmem2block_dma_enable_write(1);
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sdmem2block_dma_enable_write(1);
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