flow/actor, actorlib/structuring: add packet support
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@ -8,9 +8,9 @@ def _rawbits_layout(l):
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return l
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class Cast(CombinatorialActor):
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def __init__(self, layout_from, layout_to, reverse_from=False, reverse_to=False):
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self.sink = Sink(_rawbits_layout(layout_from))
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self.source = Source(_rawbits_layout(layout_to))
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def __init__(self, layout_from, layout_to, reverse_from=False, reverse_to=False, packetized=False):
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self.sink = Sink(_rawbits_layout(layout_from), packetized)
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self.source = Source(_rawbits_layout(layout_to), packetized)
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CombinatorialActor.__init__(self)
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###
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@ -29,16 +29,18 @@ def pack_layout(l, n):
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return [("chunk"+str(i), l) for i in range(n)]
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class Unpack(Module):
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def __init__(self, n, layout_to, reverse=False):
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self.sink = Sink(pack_layout(layout_to, n))
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self.source = Source(layout_to)
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def __init__(self, n, layout_to, reverse=False, packetized=False):
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self.sink = Sink(pack_layout(layout_to, n), packetized)
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self.source = Source(layout_to, packetized)
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self.busy = Signal()
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###
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mux = Signal(max=n)
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first = Signal()
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last = Signal()
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self.comb += [
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first.eq(mux == 0),
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last.eq(mux == (n-1)),
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self.source.stb.eq(self.sink.stb),
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self.sink.ack.eq(last & self.source.ack)
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@ -58,10 +60,16 @@ class Unpack(Module):
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cases[i] = [self.source.payload.raw_bits().eq(getattr(self.sink.payload, "chunk"+str(chunk)).raw_bits())]
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self.comb += Case(mux, cases).makedefault()
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if packetized:
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self.comb += [
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self.source.sop.eq(self.source.stb & self.sink.sop & first),
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self.source.eop.eq(self.source.stb & self.sink.eop & last)
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]
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class Pack(Module):
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def __init__(self, layout_from, n, reverse=False):
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self.sink = Sink(layout_from)
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self.source = Source(pack_layout(layout_from, n))
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def __init__(self, layout_from, n, reverse=False, packetized=False):
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self.sink = sink = Sink(layout_from, packetized)
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self.source = source = Source(pack_layout(layout_from, n), packetized)
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self.busy = Signal()
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###
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@ -73,18 +81,24 @@ class Pack(Module):
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cases = {}
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for i in range(n):
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chunk = n-i-1 if reverse else i
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cases[i] = [getattr(self.source.payload, "chunk"+str(chunk)).raw_bits().eq(self.sink.payload.raw_bits())]
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cases[i] = [getattr(source.payload, "chunk"+str(chunk)).raw_bits().eq(sink.payload.raw_bits())]
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self.comb += [
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self.busy.eq(strobe_all),
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self.sink.ack.eq(~strobe_all | self.source.ack),
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self.source.stb.eq(strobe_all),
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load_part.eq(self.sink.stb & self.sink.ack)
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sink.ack.eq(~strobe_all | source.ack),
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source.stb.eq(strobe_all),
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load_part.eq(sink.stb & sink.ack)
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]
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if packetized:
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demux_last = ((demux == (n - 1)) | sink.eop)
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else:
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demux_last = (demux == (n - 1))
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self.sync += [
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If(self.source.ack, strobe_all.eq(0)),
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If(source.ack, strobe_all.eq(0)),
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If(load_part,
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Case(demux, cases),
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If(demux == (n - 1),
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If(demux_last,
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demux.eq(0),
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strobe_all.eq(1)
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).Else(
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@ -92,3 +106,19 @@ class Pack(Module):
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)
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)
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]
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if packetized:
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sop = Signal()
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eop = Signal()
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self.sync += [
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If(source.stb & source.ack,
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sop.eq(load_part & sink.sop)
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).Else(
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sop.eq((load_part & sink.sop) | sop)
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),
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eop.eq(load_part & sink.eop)
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]
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self.comb += [
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source.sop.eq(source.stb & sop),
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source.eop.eq(source.stb & eop),
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]
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@ -22,6 +22,7 @@ def _check_layout(layout, packetized):
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class _Endpoint(Record):
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def __init__(self, layout, packetized=False):
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self.packetized = packetized
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_check_layout(layout, packetized)
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endpoint_layout = [
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("payload", _make_m2s(layout)),
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@ -66,21 +67,30 @@ class BinaryActor(Module):
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self.busy = Signal()
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sink = get_single_ep(self, Sink)[1]
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source = get_single_ep(self, Source)[1]
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self.build_binary_control(sink.stb, sink.ack, source.stb, source.ack, *args, **kwargs)
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self.build_binary_control(sink, source, *args, **kwargs)
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def build_binary_control(self, stb_i, ack_o, stb_o, ack_i):
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def build_binary_control(self, sink, source):
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raise NotImplementedError("Binary actor classes must overload build_binary_control_fragment")
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class CombinatorialActor(BinaryActor):
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def build_binary_control(self, stb_i, ack_o, stb_o, ack_i):
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self.comb += [stb_o.eq(stb_i), ack_o.eq(ack_i), self.busy.eq(0)]
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def build_binary_control(self, sink, source):
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self.comb += [
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source.stb.eq(sink.stb),
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sink.ack.eq(source.ack),
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self.busy.eq(0)
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]
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if sink.packetized:
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self.comb += [
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source.sop.eq(sink.sop),
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source.eop.eq(sink.eop)
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]
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class SequentialActor(BinaryActor):
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def __init__(self, delay):
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self.trigger = Signal()
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BinaryActor.__init__(self, delay)
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def build_binary_control(self, stb_i, ack_o, stb_o, ack_i, delay):
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def build_binary_control(self, sink, source, delay):
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ready = Signal()
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timer = Signal(max=delay+1)
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self.comb += ready.eq(timer == 0)
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@ -92,24 +102,29 @@ class SequentialActor(BinaryActor):
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mask = Signal()
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self.comb += [
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stb_o.eq(ready & mask),
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self.trigger.eq(stb_i & (ack_i | ~mask) & ready),
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ack_o.eq(self.trigger),
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source.stb.eq(ready & mask),
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self.trigger.eq(sink.stb & (source.ack | ~mask) & ready),
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sink.ack.eq(self.trigger),
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self.busy.eq(~ready)
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]
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self.sync += [
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If(self.trigger, mask.eq(1)),
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If(stb_o & ack_i, mask.eq(0))
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If(source.stb & source.ack, mask.eq(0))
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]
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if sink.packetized:
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self.comb += [
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source.sop.eq(sink.sop),
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source.eop.eq(sink.eop)
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]
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class PipelinedActor(BinaryActor):
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def __init__(self, latency):
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self.pipe_ce = Signal()
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BinaryActor.__init__(self, latency)
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def build_binary_control(self, stb_i, ack_o, stb_o, ack_i, latency):
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def build_binary_control(self, sink, source, latency):
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busy = 0
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valid = stb_i
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valid = sink.stb
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for i in range(latency):
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valid_n = Signal()
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self.sync += If(self.pipe_ce, valid_n.eq(valid))
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@ -117,8 +132,26 @@ class PipelinedActor(BinaryActor):
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busy = busy | valid
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self.comb += [
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self.pipe_ce.eq(ack_i | ~valid),
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ack_o.eq(self.pipe_ce),
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stb_o.eq(valid),
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self.pipe_ce.eq(source.ack | ~valid),
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sink.ack.eq(self.pipe_ce),
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source.stb.eq(valid),
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self.busy.eq(busy)
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]
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if sink.packetized:
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sop = sink.sop
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eop = sink.eop
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for i in range(latency):
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sop_n = Signal()
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eop_n = Signal()
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self.sync += \
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If(self.pipe_ce,
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sop_n.eq(sop),
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eop_n.eq(eop)
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)
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sop = sop_n
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eop = eop_n
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self.comb += [
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source.eop.eq(eop),
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source.sop.eq(sop)
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]
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