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cpu/minerva: add pythondata and use it to compile the sources.

This commit is contained in:
Florent Kermarrec 2020-05-01 20:12:02 +02:00
parent e4a4659d4d
commit bd8a410047
2 changed files with 4 additions and 2 deletions
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5
litex/soc/cores/cpu/minerva/core.py
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@ -7,6 +7,7 @@ import subprocess
from migen import * from migen import *
from litex import get_data_mod
from litex.soc.interconnect import wishbone from litex.soc.interconnect import wishbone
from litex.soc.cores.cpu import CPU from litex.soc.cores.cpu import CPU
@ -98,8 +99,8 @@ class Minerva(CPU):
cli_params.append("--with-dcache") cli_params.append("--with-dcache")
if with_muldiv: if with_muldiv:
cli_params.append("--with-muldiv") cli_params.append("--with-muldiv")
os.system("git clone http://github.com/lambdaconcept/minerva") # FIXME: create pythondata. sdir = get_data_mod("cpu", "minerva").data_location
if subprocess.call(["python3", os.path.join("minerva", "cli.py"), *cli_params, "generate"], if subprocess.call(["python3", os.path.join(sdir, "cli.py"), *cli_params, "generate"],
stdout=open(verilog_filename, "w")): stdout=open(verilog_filename, "w")):
raise OSError("Unable to elaborate Minerva CPU, please check your nMigen/Yosys install") raise OSError("Unable to elaborate Minerva CPU, please check your nMigen/Yosys install")

1
litex_setup.py
View File

@ -46,6 +46,7 @@ repos = [
("pythondata-cpu-serv", ("https://github.com/litex-hub/", False, True)), ("pythondata-cpu-serv", ("https://github.com/litex-hub/", False, True)),
("pythondata-cpu-vexriscv", ("https://github.com/litex-hub/", False, True)), ("pythondata-cpu-vexriscv", ("https://github.com/litex-hub/", False, True)),
("pythondata-cpu-rocket", ("https://github.com/litex-hub/", False, True)), ("pythondata-cpu-rocket", ("https://github.com/litex-hub/", False, True)),
("pythondata-cpu-minerva", ("https://github.com/litex-hub/", False, True)),
] ]
repos = OrderedDict(repos) repos = OrderedDict(repos)