integration/soc/add_video_colorbars: Review/Fix #849 (Fix ColorBarsPattern clock domain).
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@ -1638,6 +1638,7 @@ class LiteXSoC(SoC):
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# Timing constraints
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self.platform.add_false_path_constraints(self.crg.cd_sys.clk, phy.cd_pcie.clk)
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# Add Video ColorBars Pattern ------------------------------------------------------------------
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def add_video_colorbars(self, name="video_colorbars", phy=None, timings="800x600@60Hz", clock_domain="sys"):
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# Video Timing Generator.
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vtg = VideoTimingGenerator(default_video_timings=timings)
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@ -1645,9 +1646,11 @@ class LiteXSoC(SoC):
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self.submodules.video_colorbars_vtg = vtg
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self.add_csr("video_colorbars_vtg")
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colorbars = ColorBarsPattern()
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# ColorsBars Pattern.
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colorbars = ClockDomainsRenamer(clock_domain)(ColorBarsPattern())
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self.submodules.video_colorbars = colorbars
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# Connect Video Timing Generator to ColorsBars Pattern.
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self.comb += [
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vtg.source.connect(colorbars.vtg_sink),
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colorbars.source.connect(phy.sink)
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