Hardware/litex
1
0
Fork 0
mirror of https://github.com/enjoy-digital/litex.git synced 2025-01-04 09:52:26 -05:00
Code Issues Projects Releases Packages Wiki Activity

mibuild/platforms/versa: add ethernet clock constraints

Browse source
This commit is contained in:
Florent Kermarrec 2015-03-17 12:04:00 +01:00
parent ba2aeb08be
commit c06ab82f13
1 changed files with 9 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

11
mibuild/platforms/versa.py
View file

@ -7,7 +7,7 @@ from mibuild.lattice.programmer import LatticeProgrammer
_io = [ _io = [
("clk100", 0, Pins("L5"), IOStandard("LVDS25")), ("clk100", 0, Pins("L5"), IOStandard("LVDS25")),
("rst_n", 0, Pins("A21"),IOStandard("LVCMOS33")), ("rst_n", 0, Pins("A21"), IOStandard("LVCMOS33")),
("user_led", 0, Pins("Y20"), IOStandard("LVCMOS33")), ("user_led", 0, Pins("Y20"), IOStandard("LVCMOS33")),
("user_led", 1, Pins("AA21"), IOStandard("LVCMOS33")), ("user_led", 1, Pins("AA21"), IOStandard("LVCMOS33")),
@ -79,6 +79,13 @@ class Platform(LatticePlatform):
def __init__(self): def __init__(self):
LatticePlatform.__init__(self, "LFE3-35EA-6FN484C", _io) LatticePlatform.__init__(self, "LFE3-35EA-6FN484C", _io)
try:
self.add_period_constraint(self.lookup_request("eth_clocks", 0).rx, 8.0)
except ConstraintError:
pass
try:
self.add_period_constraint(self.lookup_request("eth_clocks", 1).rx, 8.0)
except ConstraintError:
pass
def create_programmer(self): def create_programmer(self):
return LatticeProgrammer() return LatticeProgrammer()