liteeth: small logic optimizations on mac (eases timings on spartan6)

This commit is contained in:
Florent Kermarrec 2015-07-05 12:31:52 +02:00
parent 23541b5949
commit c1ca928ec2
2 changed files with 12 additions and 4 deletions

View File

@ -258,15 +258,14 @@ class LiteEthMACCRCChecker(Module):
fifo.reset.eq(1),
NextState("IDLE"),
)
self.comb += crc.data.eq(sink.data)
fsm.act("IDLE",
crc.data.eq(sink.data),
If(sink.stb & sink.sop & sink.ack,
crc.ce.eq(1),
NextState("COPY")
)
)
fsm.act("COPY",
crc.data.eq(sink.data),
If(sink.stb & sink.ack,
crc.ce.eq(1),
If(sink.eop,

View File

@ -41,8 +41,13 @@ class LiteEthMACPreambleInserter(Module):
inc_cnt.eq(self.source.ack)
)
)
self.comb += [
self.source.data.eq(self.sink.data),
self.source.last_be.eq(self.sink.last_be)
]
fsm.act("COPY",
Record.connect(self.sink, self.source),
Record.connect(self.sink, self.source, leave_out=["data", "last_be"]),
self.source.sop.eq(0),
If(self.sink.stb & self.sink.eop & self.source.ack,
@ -130,8 +135,12 @@ class LiteEthMACPreambleChecker(Module):
)
)
)
self.comb += [
self.source.data.eq(self.sink.data),
self.source.last_be.eq(self.sink.last_be)
]
fsm.act("COPY",
Record.connect(self.sink, self.source),
Record.connect(self.sink, self.source, leave_out=["data", "last_be"]),
self.source.sop.eq(sop),
clr_sop.eq(self.source.stb & self.source.ack),