Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

cpu/eos_s3: First cleanup pass.

This commit is contained in:
Florent Kermarrec 2021-11-14 09:10:26 +01:00
parent bce2297418
commit c30df687b4
1 changed files with 27 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

38
litex/soc/cores/cpu/eos_s3/core.py
View File

@ -52,8 +52,11 @@ class EOS_S3(CPU):
Sys_Clk1_Rst = Signal()
WB_RST = Signal()
class Open(Signal): pass
self.cpu_params = dict(
# AHB-To-FPGA Bridge
# Wishbone Master.
# -----------
i_WB_CLK = ClockSignal("Sys_Clk0"),
o_WB_RST = WB_RST,
o_WBs_ADR = Cat(Signal(2), self.pbus.adr),
@ -61,26 +64,34 @@ class EOS_S3(CPU):
o_WBs_BYTE_STB = self.pbus.sel,
o_WBs_WE = self.pbus.we,
o_WBs_STB = self.pbus.stb,
#o_WBs_RD"(), = // output | Read Enable to FPGA
o_WBs_RD = Open(), # Read Enable.
o_WBs_WR_DAT = self.pbus.dat_w,
i_WBs_RD_DAT = self.pbus.dat_r,
i_WBs_ACK = self.pbus.ack,
# SDMA Signals
# SDMA.
# -----
#SDMA_Req(4'b0000),
#SDMA_Sreq(4'b0000),
#SDMA_Done(),
#SDMA_Active(),
# FB Interrupts
# Interrupts.
# -----------
i_FB_msg_out = self.interrupt,
#FB_Int_Clr(8'h0),
#FB_Start(),
#FB_Busy= 0,
# FB Clocks
# Clocking.
# ---------
o_Sys_Clk0 = ClockSignal("Sys_Clk0"),
o_Sys_Clk0_Rst = Sys_Clk0_Rst,
o_Sys_Clk1 = ClockSignal("Sys_Clk1"),
o_Sys_Clk1_Rst = Sys_Clk1_Rst,
# Packet FIFO
# Packet FIFO.
# ------------
#Sys_PKfb_Clk = 0,
#Sys_PKfb_Rst(),
#FB_PKfbData(32'h0),
@ -88,10 +99,14 @@ class EOS_S3(CPU):
#FB_PKfbSOF = 0,
#FB_PKfbEOF = 0,
#FB_PKfbOverflow(),
# Sensor Interface
# Sensor.
# -------
#Sensor_Int(),
#TimeStamp(),
# SPI Master APB Bus
# SPI Master (APB).
# -----------------
#Sys_Pclk(),
#Sys_Pclk_Rst(),
#Sys_PSel = 0,
@ -102,7 +117,9 @@ class EOS_S3(CPU):
#SPIm_Prdata(),
#SPIm_PReady(),
#SPIm_PSlvErr(),
# Misc
# Misc.
# -----
i_Device_ID = 0xCAFE,
# FBIO Signals
#FBIO_In(),
@ -128,8 +145,7 @@ class EOS_S3(CPU):
i_FB_PKfbData_6S = 0,
i_Sys_PKfb_ClkS = 0,
i_FB_BusyS = 0,
i_WB_CLKS = 0,
i_WB_CLKS = 0
)
self.specials += Instance("gclkbuff",