Hardware/litex
1
0
Fork 0
mirror of https://github.com/enjoy-digital/litex.git synced 2025-01-04 09:52:26 -05:00
Code Issues Projects Releases Packages Wiki Activity

CHANGES.md: Update.

Browse source
This commit is contained in:
Florent Kermarrec 2024-01-23 16:02:11 +01:00
parent 4c07d72af3
commit c31ec79981
1 changed files with 3 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
CHANGES.md
View file

@ -12,6 +12,9 @@
- interconnect/ahb : Added data_width/address_width parameters.
- interconnect/ahb : Added proper byte/sel support to AHB2Wishbone.
- cpu/gowin_ae350 : Added initial support.
- cpu/naxriscv : Updated arch definition and added rvc configuration parameters.
- cpu/vexriscv_smp : Added csr/clint/plic base address configuration parameters.
- liteeth/phy : Added 7-Series/Ultrascale(+) 2500BaseX PHYs.
[> Changed
----------