Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

soc/software/bios/sdram: add Kintex Ultrascale support

This commit is contained in:
Florent Kermarrec 2017-11-08 12:59:38 +01:00
parent dcae61b6de
commit c3d902ef42
1 changed files with 15 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
litex/soc/software/bios/sdram.c
View File

@ -213,7 +213,11 @@ void sdrwloff(void)
ddrphy_wlevel_en_write(0); ddrphy_wlevel_en_write(0);
} }
#ifdef KUSDDRPHY
#define ERR_DDRPHY_DELAY 512
#else
#define ERR_DDRPHY_DELAY 32 #define ERR_DDRPHY_DELAY 32
#endif
static int write_level(int *delay, int *high_skew) static int write_level(int *delay, int *high_skew)
{ {
@ -302,10 +306,14 @@ static void read_bitslip(int *delay, int *high_skew)
for(i=DFII_PIX_DATA_SIZE/2-1;i>=0;i--) for(i=DFII_PIX_DATA_SIZE/2-1;i>=0;i--)
if(delay[i] > bitslip_thr) { if(delay[i] > bitslip_thr) {
ddrphy_dly_sel_write(1 << i); ddrphy_dly_sel_write(1 << i);
#ifdef KUSDDRPHY
ddrphy_rdly_dq_bitslip_write(1);
#else
/* 7-series SERDES in DDR mode needs 3 pulses for 1 bitslip */ /* 7-series SERDES in DDR mode needs 3 pulses for 1 bitslip */
ddrphy_rdly_dq_bitslip_write(1); ddrphy_rdly_dq_bitslip_write(1);
ddrphy_rdly_dq_bitslip_write(1); ddrphy_rdly_dq_bitslip_write(1);
ddrphy_rdly_dq_bitslip_write(1); ddrphy_rdly_dq_bitslip_write(1);
#endif
printf("%d ", i); printf("%d ", i);
} }
printf("\n"); printf("\n");
@ -371,8 +379,15 @@ static void read_delays(void)
delay_min = delay; delay_min = delay;
/* Get a bit further into the working zone */ /* Get a bit further into the working zone */
#ifdef KUSDDRPHY
for(j=0;j<8;j++) {
delay += 1;
ddrphy_rdly_dq_inc_write(1);
}
#else
delay++; delay++;
ddrphy_rdly_dq_inc_write(1); ddrphy_rdly_dq_inc_write(1);
#endif
/* Find largest working delay */ /* Find largest working delay */
while(1) { while(1) {