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Merge pull request #897 from antmicro/jboc/dq-dqs-training 

software/liblitedram: use single iteration of dq-dqs training
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enjoy-digital 2021-04-27 13:30:03 +02:00 committed by GitHub
parent 4c26dbe98f ad23130a9a
commit c4195254ed
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1 changed files with 7 additions and 13 deletions
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20
litex/soc/software/liblitedram/sdram.c
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@ -1075,22 +1075,16 @@ static void sdram_read_leveling_best_bitslip(int module)
static void sdram_write_dq_dqs_training(void) static void sdram_write_dq_dqs_training(void)
{ {
/* In the first iteration read leveling and DQ-DQS training may not be done optimally */
const int n_iter = 2;
int i; int i;
int show;
int module; int module;
for (i = 0; i < n_iter; ++i) { for(module=0; module<SDRAM_PHY_MODULES; module++) {
show = i == n_iter - 1; /* Find best bitslip */
for(module=0; module<SDRAM_PHY_MODULES; module++) { sdram_read_leveling_best_bitslip(module);
/* Find best bitslip */ /* Center DQ-DQS window */
sdram_read_leveling_best_bitslip(module); sdram_leveling_center_module(module, 1, 1,
/* Center DQ-DQS window */ sdram_write_dq_dqs_training_rst_delay, sdram_write_dq_dqs_training_inc_delay);
sdram_leveling_center_module(module, show, show, }
sdram_write_dq_dqs_training_rst_delay, sdram_write_dq_dqs_training_inc_delay);
}
}
} }
#endif /* SDRAM_PHY_WRITE_DQ_DQS_TRAINING_CAPABLE */ #endif /* SDRAM_PHY_WRITE_DQ_DQS_TRAINING_CAPABLE */