software/liblitedram: Use new DQS delay reset procedure on Ultrascale(+) (by increments).
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@ -343,10 +343,21 @@ static void sdram_write_leveling_rst_delay(int module) {
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/* Select module */
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ddrphy_dly_sel_write(1 << module);
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/* Reset delay */
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#if defined(SDRAM_PHY_USDDRPHY) || defined(SDRAM_PHY_USPDDRPHY)
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/* Reset DQ delay */
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ddrphy_wdly_dq_rst_write(1);
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/* Reset DQS delay */
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while (ddrphy_wdly_dqs_inc_count_read() != 0) {
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ddrphy_wdly_dqs_inc_write(1);
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cdelay(100);
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}
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#else
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/* Reset DQ/DQS delay */
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ddrphy_wdly_dq_rst_write(1);
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ddrphy_wdly_dqs_rst_write(1);
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cdelay(100);
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#endif
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/* Un-select module */
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ddrphy_dly_sel_write(0);
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@ -356,7 +367,7 @@ static void sdram_write_leveling_inc_delay(int module) {
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/* Select module */
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ddrphy_dly_sel_write(1 << module);
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/* Increment delay */
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/* Increment DQ/DQS delay */
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ddrphy_wdly_dq_inc_write(1);
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ddrphy_wdly_dqs_inc_write(1);
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