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soc/integration/soc_core: list rocket as supported CPU

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This commit is contained in:
Florent Kermarrec 2019-06-07 11:14:36 +02:00
parent ca4e7811e9
commit c64129dc69
1 changed files with 1 additions and 1 deletions
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2
litex/soc/integration/soc_core.py
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@ -576,7 +576,7 @@ class SoCCore(Module):
def soc_core_args(parser):
parser.add_argument("--cpu-type", default=None,
help="select CPU: lm32, or1k, picorv32, vexriscv, minerva")
help="select CPU: lm32, or1k, picorv32, vexriscv, minerva, rocket")
parser.add_argument("--cpu-variant", default=None,
help="select CPU variant")
parser.add_argument("--integrated-rom-size", default=None, type=int,