RFC: json2dts: set CPU clock-frequency and SoC bus-frequency
FIXME: timebase-frequency isn't to be used as the raw CPU clock, so on vexriscv we might want to re-evaluate also setting *that* to the `CONFIG_CLOCK_FREQUENCY`. Decide whether to keep the SoC's `bus-frequency` cell, or whether to go with the CPU's `clock-frequency` only.
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@ -56,7 +56,7 @@ def generate_dts(d):
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#size-cells = <0>;
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timebase-frequency = <{sys_clk_freq}>;
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cpu@0 {{
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clock-frequency = <0x0>;
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clock-frequency = <{sys_clk_freq}>;
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compatible = "spinalhdl,vexriscv", "sifive,rocket0", "riscv";
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d-cache-block-size = <0x40>;
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d-cache-sets = <0x40>;
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@ -128,9 +128,10 @@ def generate_dts(d):
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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bus-frequency = <{sys_clk_freq}>;
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compatible = "simple-bus";
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ranges;
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"""
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""".format(sys_clk_freq=d["constants"]["config_clock_frequency"])
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# Interrupt controller -----------------------------------------------------------------------------
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