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RFC: json2dts: set CPU clock-frequency and SoC bus-frequency 

FIXME: timebase-frequency isn't to be used as the raw CPU clock, so
on vexriscv we might want to re-evaluate also setting *that* to the
`CONFIG_CLOCK_FREQUENCY`. Decide whether to keep the SoC's
`bus-frequency` cell, or whether to go with the CPU's `clock-frequency`
only.
This commit is contained in:
Gabriel Somlo 2020-09-23 14:16:14 -04:00
parent b84a858b2c
commit c77da3a8bc
1 changed files with 3 additions and 2 deletions
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5
litex/tools/litex_json2dts.py
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@ -56,7 +56,7 @@ def generate_dts(d):
#size-cells = <0>; #size-cells = <0>;
timebase-frequency = <{sys_clk_freq}>; timebase-frequency = <{sys_clk_freq}>;
cpu@0 {{ cpu@0 {{
clock-frequency = <0x0>; clock-frequency = <{sys_clk_freq}>;
compatible = "spinalhdl,vexriscv", "sifive,rocket0", "riscv"; compatible = "spinalhdl,vexriscv", "sifive,rocket0", "riscv";
d-cache-block-size = <0x40>; d-cache-block-size = <0x40>;
d-cache-sets = <0x40>; d-cache-sets = <0x40>;
@ -128,9 +128,10 @@ def generate_dts(d):
soc { soc {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
bus-frequency = <{sys_clk_freq}>;
compatible = "simple-bus"; compatible = "simple-bus";
ranges; ranges;
""" """.format(sys_clk_freq=d["constants"]["config_clock_frequency"])
# Interrupt controller ----------------------------------------------------------------------------- # Interrupt controller -----------------------------------------------------------------------------