interconnect/stream: add Converter (needs cleanup)
This commit is contained in:
Sebastien Bourdeauducq
parent
4707a25484
commit
ca9631f7d3
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@ -149,3 +149,239 @@ class Demultiplexer(Module):
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for i, source in enumerate(sources):
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cases[i] = Record.connect(self.sink, source)
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self.comb += Case(self.sel, cases)
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# TODO: clean up code below
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# XXX
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from copy import copy
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from migen.util.misc import xdir
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def pack_layout(l, n):
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return [("chunk"+str(i), l) for i in range(n)]
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def get_endpoints(obj, filt=_Endpoint):
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if hasattr(obj, "get_endpoints") and callable(obj.get_endpoints):
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return obj.get_endpoints(filt)
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r = dict()
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for k, v in xdir(obj, True):
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if isinstance(v, filt):
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r[k] = v
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return r
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def get_single_ep(obj, filt):
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eps = get_endpoints(obj, filt)
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if len(eps) != 1:
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raise ValueError("More than one endpoint")
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return list(eps.items())[0]
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class BinaryActor(Module):
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def __init__(self, *args, **kwargs):
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self.busy = Signal()
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sink = get_single_ep(self, Sink)[1]
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source = get_single_ep(self, Source)[1]
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self.build_binary_control(sink, source, *args, **kwargs)
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def build_binary_control(self, sink, source):
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raise NotImplementedError("Binary actor classes must overload build_binary_control_fragment")
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class CombinatorialActor(BinaryActor):
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def build_binary_control(self, sink, source):
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self.comb += [
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source.stb.eq(sink.stb),
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sink.ack.eq(source.ack),
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self.busy.eq(0)
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]
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if sink.description.packetized:
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self.comb += [
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source.sop.eq(sink.sop),
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source.eop.eq(sink.eop)
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]
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class Unpack(Module):
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def __init__(self, n, layout_to, reverse=False):
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self.source = source = Source(layout_to)
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description_from = copy(source.description)
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description_from.payload_layout = pack_layout(description_from.payload_layout, n)
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self.sink = sink = Sink(description_from)
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self.busy = Signal()
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###
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mux = Signal(max=n)
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first = Signal()
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last = Signal()
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self.comb += [
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first.eq(mux == 0),
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last.eq(mux == (n-1)),
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source.stb.eq(sink.stb),
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sink.ack.eq(last & source.ack)
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]
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self.sync += [
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If(source.stb & source.ack,
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If(last,
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mux.eq(0)
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).Else(
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mux.eq(mux + 1)
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)
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)
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]
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cases = {}
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for i in range(n):
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chunk = n-i-1 if reverse else i
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cases[i] = [source.payload.raw_bits().eq(getattr(sink.payload, "chunk"+str(chunk)).raw_bits())]
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self.comb += Case(mux, cases).makedefault()
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if description_from.packetized:
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self.comb += [
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source.sop.eq(sink.sop & first),
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source.eop.eq(sink.eop & last)
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]
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class Pack(Module):
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def __init__(self, layout_from, n, reverse=False):
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self.sink = sink = Sink(layout_from)
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description_to = copy(sink.description)
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description_to.payload_layout = pack_layout(description_to.payload_layout, n)
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self.source = source = Source(description_to)
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self.busy = Signal()
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###
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demux = Signal(max=n)
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load_part = Signal()
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strobe_all = Signal()
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cases = {}
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for i in range(n):
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chunk = n-i-1 if reverse else i
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cases[i] = [getattr(source.payload, "chunk"+str(chunk)).raw_bits().eq(sink.payload.raw_bits())]
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self.comb += [
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self.busy.eq(strobe_all),
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sink.ack.eq(~strobe_all | source.ack),
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source.stb.eq(strobe_all),
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load_part.eq(sink.stb & sink.ack)
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]
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if description_to.packetized:
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demux_last = ((demux == (n - 1)) | sink.eop)
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else:
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demux_last = (demux == (n - 1))
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self.sync += [
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If(source.ack, strobe_all.eq(0)),
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If(load_part,
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Case(demux, cases),
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If(demux_last,
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demux.eq(0),
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strobe_all.eq(1)
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).Else(
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demux.eq(demux + 1)
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)
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)
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]
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if description_to.packetized:
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self.sync += [
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If(source.stb & source.ack,
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source.sop.eq(sink.sop),
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source.eop.eq(sink.eop),
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).Elif(sink.stb & sink.ack,
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source.sop.eq(sink.sop | source.sop),
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source.eop.eq(sink.eop | source.eop)
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)
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]
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class Chunkerize(CombinatorialActor):
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def __init__(self, layout_from, layout_to, n, reverse=False):
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self.sink = Sink(layout_from)
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if isinstance(layout_to, EndpointDescription):
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layout_to = copy(layout_to)
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layout_to.payload_layout = pack_layout(layout_to.payload_layout, n)
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else:
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layout_to = pack_layout(layout_to, n)
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self.source = Source(layout_to)
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CombinatorialActor.__init__(self)
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###
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for i in range(n):
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chunk = n-i-1 if reverse else i
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for f in self.sink.description.payload_layout:
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src = getattr(self.sink, f[0])
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dst = getattr(getattr(self.source, "chunk"+str(chunk)), f[0])
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self.comb += dst.eq(src[i*len(src)//n:(i+1)*len(src)//n])
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class Unchunkerize(CombinatorialActor):
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def __init__(self, layout_from, n, layout_to, reverse=False):
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if isinstance(layout_from, EndpointDescription):
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fields = layout_from.payload_layout
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layout_from = copy(layout_from)
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layout_from.payload_layout = pack_layout(layout_from.payload_layout, n)
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else:
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fields = layout_from
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layout_from = pack_layout(layout_from, n)
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self.sink = Sink(layout_from)
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self.source = Source(layout_to)
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CombinatorialActor.__init__(self)
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###
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for i in range(n):
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chunk = n-i-1 if reverse else i
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for f in fields:
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src = getattr(getattr(self.sink, "chunk"+str(chunk)), f[0])
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dst = getattr(self.source, f[0])
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self.comb += dst[i*len(dst)//n:(i+1)*len(dst)//n].eq(src)
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class Converter(Module):
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def __init__(self, layout_from, layout_to, reverse=False):
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self.sink = Sink(layout_from)
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self.source = Source(layout_to)
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self.busy = Signal()
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###
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width_from = len(self.sink.payload.raw_bits())
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width_to = len(self.source.payload.raw_bits())
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# downconverter
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if width_from > width_to:
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if width_from % width_to:
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raise ValueError
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ratio = width_from//width_to
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self.submodules.chunkerize = Chunkerize(layout_from, layout_to, ratio, reverse)
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self.submodules.unpack = Unpack(ratio, layout_to)
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self.comb += [
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Record.connect(self.sink, self.chunkerize.sink),
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Record.connect(self.chunkerize.source, self.unpack.sink),
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Record.connect(self.unpack.source, self.source),
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self.busy.eq(self.unpack.busy)
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]
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# upconverter
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elif width_to > width_from:
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if width_to % width_from:
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raise ValueError
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ratio = width_to//width_from
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self.submodules.pack = Pack(layout_from, ratio)
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self.submodules.unchunkerize = Unchunkerize(layout_from, ratio, layout_to, reverse)
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self.comb += [
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Record.connect(self.sink, self.pack.sink),
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Record.connect(self.pack.source, self.unchunkerize.sink),
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Record.connect(self.unchunkerize.source, self.source),
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self.busy.eq(self.pack.busy)
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]
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# direct connection
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else:
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self.comb += Record.connect(self.sink, self.source)
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# XXX
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