tools/litex_sim: Fix mem_map.

2021-09-13 11:33:16 +02:00 · 2021-09-13 11:33:16 +02:00 · cb7b0f44cf
parent e0e9311ceb
commit cb7b0f44cf
1 changed files with 1 additions and 3 deletions
--- a/litex/tools/litex_sim.py
+++ b/litex/tools/litex_sim.py
@ -98,9 +98,7 @@ class Platform(SimPlatform):
 # Simulation SoC -----------------------------------------------------------------------------------

 class SimSoC(SoCCore):
-    mem_map = {
-        "spiflash" : 0x80000000,
-    }
+    mem_map = {**SoCCore.mem_map, **{"spiflash": 0x80000000}}
    def __init__(self,
        with_sdram            = False,
        with_ethernet         = False,