Merge pull request #130 from jfng/master
litex_sim: add --trace argument
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commit
cc4ba65659
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@ -221,6 +221,8 @@ def main():
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help="enable Etherbone support")
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help="enable Etherbone support")
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parser.add_argument("--with-analyzer", action="store_true",
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parser.add_argument("--with-analyzer", action="store_true",
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help="enable Analyzer support")
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help="enable Analyzer support")
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parser.add_argument("--trace", action="store_true",
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help="enable VCD tracing")
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args = parser.parse_args()
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args = parser.parse_args()
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soc_kwargs = soc_sdram_argdict(args)
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soc_kwargs = soc_sdram_argdict(args)
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@ -250,10 +252,10 @@ def main():
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**soc_kwargs)
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**soc_kwargs)
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builder_kwargs["csr_csv"] = "csr.csv"
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builder_kwargs["csr_csv"] = "csr.csv"
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builder = Builder(soc, **builder_kwargs)
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builder = Builder(soc, **builder_kwargs)
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vns = builder.build(run=False, threads=args.threads, sim_config=sim_config)
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vns = builder.build(run=False, threads=args.threads, sim_config=sim_config, trace=args.trace)
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if args.with_analyzer:
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if args.with_analyzer:
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soc.analyzer.export_csv(vns, "analyzer.csv")
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soc.analyzer.export_csv(vns, "analyzer.csv")
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builder.build(build=False, threads=args.threads, sim_config=sim_config)
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builder.build(build=False, threads=args.threads, sim_config=sim_config, trace=args.trace)
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if __name__ == "__main__":
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if __name__ == "__main__":
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