soc/software/liblitedram: use updated sdram_dfii_pix_X_addr interface
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@ -290,7 +290,7 @@ static int sdram_write_read_check_test_pattern(int module, unsigned int seed) {
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/* Write pseudo-random sequence */
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/* Write pseudo-random sequence */
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for(p=0;p<SDRAM_PHY_PHASES;p++)
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for(p=0;p<SDRAM_PHY_PHASES;p++)
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csr_wr_buf_uint8(sdram_dfii_pix_wrdata_addr[p], prs[p], DFII_PIX_DATA_BYTES);
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csr_wr_buf_uint8(sdram_dfii_pix_wrdata_addr(p), prs[p], DFII_PIX_DATA_BYTES);
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sdram_dfii_piwr_address_write(0);
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sdram_dfii_piwr_address_write(0);
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sdram_dfii_piwr_baddress_write(0);
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sdram_dfii_piwr_baddress_write(0);
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command_pwr(DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS|DFII_COMMAND_WRDATA);
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command_pwr(DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS|DFII_COMMAND_WRDATA);
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@ -311,7 +311,7 @@ static int sdram_write_read_check_test_pattern(int module, unsigned int seed) {
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for(p=0;p<SDRAM_PHY_PHASES;p++) {
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for(p=0;p<SDRAM_PHY_PHASES;p++) {
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/* Read back test pattern */
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/* Read back test pattern */
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csr_rd_buf_uint8(sdram_dfii_pix_rddata_addr[p], tst, DFII_PIX_DATA_BYTES);
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csr_rd_buf_uint8(sdram_dfii_pix_rddata_addr(p), tst, DFII_PIX_DATA_BYTES);
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/* Verify bytes matching current 'module' */
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/* Verify bytes matching current 'module' */
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if (prs[p][ SDRAM_PHY_MODULES-1-module] != tst[ SDRAM_PHY_MODULES-1-module] ||
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if (prs[p][ SDRAM_PHY_MODULES-1-module] != tst[ SDRAM_PHY_MODULES-1-module] ||
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prs[p][2*SDRAM_PHY_MODULES-1-module] != tst[2*SDRAM_PHY_MODULES-1-module])
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prs[p][2*SDRAM_PHY_MODULES-1-module] != tst[2*SDRAM_PHY_MODULES-1-module])
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@ -583,7 +583,7 @@ static int sdram_write_leveling_scan(int *delays, int loops, int show)
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for (k=0; k<loops; k++) {
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for (k=0; k<loops; k++) {
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ddrphy_wlevel_strobe_write(1);
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ddrphy_wlevel_strobe_write(1);
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cdelay(100);
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cdelay(100);
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csr_rd_buf_uint8(sdram_dfii_pix_rddata_addr[0], buf, DFII_PIX_DATA_BYTES);
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csr_rd_buf_uint8(sdram_dfii_pix_rddata_addr(0), buf, DFII_PIX_DATA_BYTES);
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if (buf[SDRAM_PHY_MODULES-1-i] != 0)
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if (buf[SDRAM_PHY_MODULES-1-i] != 0)
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one_count++;
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one_count++;
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else
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else
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