Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

software/liblitedram/sdram.c: improve reporting. 

- ident sub-reports.
- avoid displaying software/hardware swich if set to previous value.
This commit is contained in:
Florent Kermarrec 2020-09-15 19:41:20 +02:00
parent e63a40370e
commit cfe6f56572
1 changed files with 23 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

27
litex/soc/software/liblitedram/sdram.c
View File

@ -58,16 +58,27 @@ int sdrfreq(void) {
/* Software/Hardware Control */
/*-----------------------------------------------------------------------*/
#define DFII_CONTROL_SOFTWARE (DFII_CONTROL_CKE|DFII_CONTROL_ODT|DFII_CONTROL_RESET_N)
#define DFII_CONTROL_HARDWARE (DFII_CONTROL_SEL)
void sdrsw(void)
{
sdram_dfii_control_write(DFII_CONTROL_CKE|DFII_CONTROL_ODT|DFII_CONTROL_RESET_N);
printf("SDRAM now under software control\n");
unsigned int previous;
previous = sdram_dfii_control_read();
if (previous != DFII_CONTROL_SOFTWARE) {
sdram_dfii_control_write(DFII_CONTROL_SOFTWARE);
printf("Switching SDRAM to software control.\n");
}
}
void sdrhw(void)
{
sdram_dfii_control_write(DFII_CONTROL_SEL);
printf("SDRAM now under hardware control\n");
unsigned int previous;
previous = sdram_dfii_control_read();
if (previous != DFII_CONTROL_HARDWARE) {
sdram_dfii_control_write(DFII_CONTROL_HARDWARE);
printf("Switching SDRAM to hardware control.\n");
}
}
/*-----------------------------------------------------------------------*/
@ -424,7 +435,7 @@ int write_level(void)
int cdly_range_step;
#ifndef SDRAM_PHY_CMD_DELAY
printf("Command/Clk scan:\n");
printf(" Cmd/Clk scan:\n");
/* Center write leveling by varying cdly. Searching through all possible
* values is slow, but we can use a simple optimization method of iterativly
@ -458,7 +469,7 @@ int write_level(void)
#else
best_cdly = SDRAM_PHY_CMD_DELAY;
#endif
printf("Forcing Command/Clk delay to %d taps.\n", best_cdly);
printf(" Setting Cmd/Clk delay to %d taps.\n", best_cdly);
/* set working or forced delay */
if (best_cdly >= 0) {
ddrphy_cdly_rst_write(1);
@ -577,7 +588,7 @@ static int read_level_scan(int module, int bitslip)
sdram_dfii_pird_baddress_write(0);
score = 0;
printf("m%d, b%02d: |", module, bitslip);
printf(" m%d, b%d: |", module, bitslip);
read_delay_rst(module);
for(i=0;i<SDRAM_PHY_DELAYS;i++) {
int working = 1;
@ -861,7 +872,7 @@ int sdrinit(void)
int i;
for (i=0; i<16; i++) sdrwl_delays[i] = -1; /* disabled forced delays */
printf("Initializing DRAM @0x%08x...\n", MAIN_RAM_BASE);
printf("Initializing SDRAM @0x%08x...\n", MAIN_RAM_BASE);
#if CSR_DDRPHY_RST_ADDR
ddrphy_rst_write(1);