integration/builder: generate shadow_base address to mem.h and csv
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parent
cb2d4372e4
commit
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@ -58,6 +58,7 @@ class Builder:
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cpu_type = self.soc.cpu_type
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memory_regions = self.soc.get_memory_regions()
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flash_boot_address = getattr(self.soc, "flash_boot_address", None)
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shadow_base = getattr(self.soc, "shadow_base", None)
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csr_regions = self.soc.get_csr_regions()
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constants = self.soc.get_constants()
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@ -102,7 +103,7 @@ class Builder:
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write_to_file(
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os.path.join(generated_dir, "mem.h"),
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cpu_interface.get_mem_header(memory_regions, flash_boot_address))
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cpu_interface.get_mem_header(memory_regions, flash_boot_address, shadow_base))
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write_to_file(
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os.path.join(generated_dir, "csr.h"),
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cpu_interface.get_csr_header(csr_regions, constants))
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@ -120,6 +121,10 @@ class Builder:
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csr_regions = self.soc.get_csr_regions()
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constants = self.soc.get_constants()
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shadow_base = getattr(self.soc, "shadow_base", None)
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if shadow_base:
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constants.append(('shadow_base', shadow_base))
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csr_dir = os.path.dirname(os.path.realpath(self.csr_csv))
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os.makedirs(csr_dir, exist_ok=True)
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write_to_file(
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@ -70,13 +70,15 @@ def get_linker_regions(regions):
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return r
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def get_mem_header(regions, flash_boot_address):
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def get_mem_header(regions, flash_boot_address, shadow_base):
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r = generated_banner("//")
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r += "#ifndef __GENERATED_MEM_H\n#define __GENERATED_MEM_H\n\n"
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for name, base, size in regions:
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r += "#define {name}_BASE 0x{base:08x}L\n#define {name}_SIZE 0x{size:08x}\n\n".format(name=name.upper(), base=base, size=size)
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if flash_boot_address is not None:
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r += "#define FLASH_BOOT_ADDRESS 0x{:08x}L\n\n".format(flash_boot_address)
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if shadow_base is not None:
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r += "#define SHADOW_BASE 0x{:08x}L\n\n".format(shadow_base)
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r += "#endif\n"
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return r
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