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lasmicon: remove limitations on the number of phases
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parent
7acd834964
commit
d1dddad811
5 changed files with 45 additions and 13 deletions
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@ -7,7 +7,7 @@ from milkymist.lasmicon.refresher import *
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from milkymist.lasmicon.bankmachine import *
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from milkymist.lasmicon.multiplexer import *
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PhySettings = namedtuple("PhySettings", "memtype dfi_d nphases rdphase wrphase cl read_latency write_latency")
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PhySettings = namedtuple("PhySettings", "memtype dfi_d nphases rdphase wrphase rdcmdphase wrcmdphase cl read_latency write_latency")
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class GeomSettings(namedtuple("_GeomSettings", "bank_a row_a col_a")):
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def __init__(self, *args, **kwargs):
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@ -18,6 +18,9 @@ TimingSettings = namedtuple("TimingSettings", "tRP tRCD tWR tWTR tREFI tRFC" \
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class LASMIcon(Module):
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def __init__(self, phy_settings, geom_settings, timing_settings):
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if phy_settings.memtype in ["SDR"]:
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burst_length = phy_settings.nphases*1 # command multiplication*SDR
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elif phy_settings.memtype in ["DDR", "LPDDR", "DDR2", "DDR3"]:
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burst_length = phy_settings.nphases*2 # command multiplication*DDR
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address_align = log2_int(burst_length)
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@ -122,19 +122,22 @@ class BankMachine(Module):
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self.cmd.stb.eq(1),
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If(self.cmd.ack, NextState("TRP")),
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self.cmd.ras_n.eq(0),
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self.cmd.we_n.eq(0)
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self.cmd.we_n.eq(0),
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self.cmd.is_cmd.eq(1)
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)
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)
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fsm.act("ACTIVATE",
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s_row_adr.eq(1),
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track_open.eq(1),
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self.cmd.stb.eq(1),
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self.cmd.is_cmd.eq(1),
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If(self.cmd.ack, NextState("TRCD")),
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self.cmd.ras_n.eq(0)
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)
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fsm.act("REFRESH",
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self.refresh_gnt.eq(precharge_ok),
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track_close.eq(1),
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self.cmd.is_cmd.eq(1),
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If(~self.refresh_req, NextState("REGULAR"))
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)
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fsm.delayed_enter("TRP", "ACTIVATE", timing_settings.tRP-1)
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@ -19,6 +19,7 @@ class CommandRequestRW(CommandRequest):
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CommandRequest.__init__(self, a, ba)
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self.stb = Signal()
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self.ack = Signal()
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self.is_cmd = Signal()
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self.is_read = Signal()
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self.is_write = Signal()
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@ -26,6 +27,7 @@ class _CommandChooser(Module):
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def __init__(self, requests):
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self.want_reads = Signal()
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self.want_writes = Signal()
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self.want_cmds = Signal()
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# NB: cas_n/ras_n/we_n are 1 when stb is inactive
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self.cmd = CommandRequestRW(flen(requests[0].a), flen(requests[0].ba))
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@ -34,12 +36,12 @@ class _CommandChooser(Module):
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rr = RoundRobin(len(requests), SP_CE)
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self.submodules += rr
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self.comb += [rr.request[i].eq(req.stb & ((req.is_read == self.want_reads) | (req.is_write == self.want_writes)))
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self.comb += [rr.request[i].eq(req.stb & ((req.is_cmd & self.want_cmds) | ((req.is_read == self.want_reads) | (req.is_write == self.want_writes))))
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for i, req in enumerate(requests)]
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stb = Signal()
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self.comb += stb.eq(Array(req.stb for req in requests)[rr.grant])
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for name in ["a", "ba", "is_read", "is_write"]:
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for name in ["a", "ba", "is_read", "is_write", "is_cmd"]:
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choices = Array(getattr(req, name) for req in requests)
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self.comb += getattr(self.cmd, name).eq(choices[rr.grant])
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for name in ["cas_n", "ras_n", "we_n"]:
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@ -47,8 +49,8 @@ class _CommandChooser(Module):
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choices = Array(getattr(req, name) for req in requests)
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self.comb += If(self.cmd.stb, getattr(self.cmd, name).eq(choices[rr.grant]))
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self.comb += self.cmd.stb.eq(stb \
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& (self.cmd.is_read == self.want_reads) \
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& (self.cmd.is_write == self.want_writes))
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& ((self.cmd.is_cmd & self.want_cmds) | ((self.cmd.is_read == self.want_reads) \
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& (self.cmd.is_write == self.want_writes))))
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self.comb += [If(self.cmd.stb & self.cmd.ack & (rr.grant == i), req.ack.eq(1))
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for i, req in enumerate(requests)]
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@ -85,8 +87,6 @@ class _Steerer(Module):
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class Multiplexer(Module, AutoCSR):
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def __init__(self, phy_settings, geom_settings, timing_settings, bank_machines, refresher, dfi, lasmic):
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assert(phy_settings.nphases == len(dfi.phases))
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if phy_settings.nphases != 2:
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raise NotImplementedError("TODO: multiplexer only supports 2 phases")
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# Command choosing
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requests = [bm.cmd for bm in bank_machines]
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@ -96,6 +96,11 @@ class Multiplexer(Module, AutoCSR):
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choose_cmd.want_reads.eq(0),
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choose_cmd.want_writes.eq(0)
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]
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if phy_settings.nphases == 1:
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self.comb += [
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choose_cmd.want_cmds.eq(1),
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choose_req.want_cmds.eq(1)
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]
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self.submodules += choose_cmd, choose_req
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# Command steering
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@ -148,14 +153,32 @@ class Multiplexer(Module, AutoCSR):
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# Control FSM
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fsm = FSM()
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(STEER_WRITE, STEER_READ) = range(2)
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def steerer_sel(steerer, phy_settings, r_w_n):
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r = []
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for i in range(phy_settings.nphases):
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s = steerer.sel[i].eq(STEER_NOP)
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if r_w_n:
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if i == phy_settings.rdphase:
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s = steerer.sel[i].eq(STEER_REQ)
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elif i == phy_settings.wrcmdphase:
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s = steerer.sel[i].eq(STEER_CMD)
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else:
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if i == phy_settings.wrphase:
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s = steerer.sel[i].eq(STEER_REQ)
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elif i == phy_settings.rdcmdphase:
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s = steerer.sel[i].eq(STEER_CMD)
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r.append(s)
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return r
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self.submodules += fsm
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fsm.act("READ",
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read_time_en.eq(1),
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choose_req.want_reads.eq(1),
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choose_cmd.cmd.ack.eq(1),
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choose_req.cmd.ack.eq(1),
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steerer.sel[1-phy_settings.rdphase].eq(STEER_CMD),
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steerer.sel[phy_settings.rdphase].eq(STEER_REQ),
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steerer_sel(steerer, phy_settings, STEER_READ),
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If(write_available,
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# TODO: switch only after several cycles of ~read_available?
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If(~read_available | max_read_time, NextState("RTW"))
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@ -167,8 +190,7 @@ class Multiplexer(Module, AutoCSR):
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choose_req.want_writes.eq(1),
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choose_cmd.cmd.ack.eq(1),
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choose_req.cmd.ack.eq(1),
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steerer.sel[1-phy_settings.wrphase].eq(STEER_CMD),
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steerer.sel[phy_settings.wrphase].eq(STEER_REQ),
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steerer_sel(steerer, phy_settings, STEER_WRITE),
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If(read_available,
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If(~write_available | max_write_time, NextState("WTR"))
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),
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@ -43,6 +43,8 @@ class S6DDRPHY(Module):
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nphases=nphases,
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rdphase=0,
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wrphase=1,
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rdcmdphase=1,
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wrcmdphase=0,
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cl=cl,
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read_latency=5,
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write_latency=0
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@ -21,6 +21,8 @@ sdram_phy = lasmicon.PhySettings(
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nphases=2,
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rdphase=0,
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wrphase=1,
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rdcmdphase=1,
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wrcmdphase=0,
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cl=3,
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read_latency=5,
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write_latency=0
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