soc/cores/i2s: fix rst parsing errors

The ModuleDoc-generated documentation for the i2s module produced
slightly invalid output due to ambiguities in how rst assigns headers.
As a result, sections from the i2s document would appear as full
sections.

This cleans up these errors so that it parses properly under sphinx.

Signed-off-by: Sean Cross <sean@xobs.io>

litex/soc/cores/i2s.py

@@ -11,9 +11,7 @@ from litex.soc.integration.doc import AutoDoc, ModuleDoc
 
 class S7I2SSlave(Module, AutoCSR, AutoDoc):
     def __init__(self, pads, fifo_depth=256):
-        self.intro = ModuleDoc("""
-        Intro
-        *******
+        self.intro = ModuleDoc("""Intro
 
         I2S slave creates a slave audio interface instance. Tx and Rx interfaces are inferred based
         upon the presence or absence of the respective pins in the "pads" argument.
@@ -24,7 +22,7 @@ class S7I2SSlave(Module, AutoCSR, AutoDoc):
         to a CODEC without a programmable bit offset!
 
         System Interface
-        =================
+        ----------------
 
         Audio interchange is done with the system using 16-bit stereo samples, with the right channel
         mapped to the least significant word of a 32-bit word. Thus each 32-bit word is a single
@@ -61,7 +59,7 @@ class S7I2SSlave(Module, AutoCSR, AutoDoc):
           in FIFO is cleared.
 
         CODEC Interface
-        ================
+        ---------------
 
         The interface assumes we have a sysclk domain running around 100MHz, and that our typical max
         audio rate is 44.1kHz * 24bits * 2channels = 2.1168MHz audio clock. Thus, the architecture
@@ -92,7 +90,6 @@ class S7I2SSlave(Module, AutoCSR, AutoDoc):
         - Sync can be longer than the wordlen, extra bits are just ignored
         - Tx is data to the codec (SDI pin on LM49352)
         - Rx is data from the codec (SDO pin on LM49352)
-
         """)
 
         # One cache line is 8 32-bit words, need to always have enough space for one line or else