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mibuild/xilinx: remove obsolete CRG_DS

This commit is contained in:
Sebastien Bourdeauducq 2015-03-14 00:27:24 +01:00
parent 6a979a8023
commit d34b7d7a6b
1 changed files with 0 additions and 16 deletions
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16
mibuild/xilinx/common.py
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@ -29,22 +29,6 @@ def settings(path, ver=None, sub=None):
raise OSError("no settings file found") raise OSError("no settings file found")
class CRG_DS(Module):
def __init__(self, platform, clk_name, rst_name, rst_invert=False):
reset_less = rst_name is None
self.clock_domains.cd_sys = ClockDomain(reset_less=reset_less)
self._clk = platform.request(clk_name)
self.specials += Instance("IBUFGDS",
Instance.Input("I", self._clk.p),
Instance.Input("IB", self._clk.n),
Instance.Output("O", self.cd_sys.clk)
)
if not reset_less:
if rst_invert:
self.comb += self.cd_sys.rst.eq(~platform.request(rst_name))
else:
self.comb += self.cd_sys.rst.eq(platform.request(rst_name))
class XilinxNoRetimingImpl(Module): class XilinxNoRetimingImpl(Module):
def __init__(self, reg): def __init__(self, reg):
self.specials += SynthesisDirective("attribute register_balancing of {r} is no", r=reg) self.specials += SynthesisDirective("attribute register_balancing of {r} is no", r=reg)