integration/soc_core: only add IRQs from interrupt_map if SoC supports them.

2020-12-03 09:48:19 +01:00 · 2020-12-03 09:48:19 +01:00 · d6a49e85c4
parent 42e7b8d35a
commit d6a49e85c4
1 changed files with 3 additions and 2 deletions
--- a/litex/soc/integration/soc_core.py
+++ b/litex/soc/integration/soc_core.py
@ -160,8 +160,9 @@ class SoCCore(LiteXSoC):
            reset_address = None if integrated_rom_size else cpu_reset_address)

        # Add User's interrupts
-        for name, loc in self.interrupt_map.items():
-            self.irq.add(name, loc)
+        if self.irq.enabled:
+            for name, loc in self.interrupt_map.items():
+                self.irq.add(name, loc)

        # Add integrated ROM
        if integrated_rom_size: