Merge pull request #65 from cr1901/tinyfpga-serial

platforms/tinyfpga_b: Move serial peripheral out of default I/O, make it

litex/boards/platforms/tinyfpga_b.py

@@ -9,12 +9,6 @@ _io = [
         IOStandard("LVCMOS33")
     ),
 
-    ("serial", 0,
-        Subsignal("tx", Pins("B2")),
-        Subsignal("rx", Pins("A2")),
-        IOStandard("LVCMOS33")
-    ),
-
     ("spiflash", 0,
         Subsignal("cs_n", Pins("F7"), IOStandard("LVCMOS33")),
         Subsignal("clk", Pins("G7"), IOStandard("LVCMOS33")),
@@ -34,6 +28,16 @@ _connectors = [
 ]
 
 
+# Default peripherals
+serial = [
+    ("serial", 0,
+        Subsignal("tx", Pins("GPIO:0")),
+        Subsignal("rx", Pins("GPIO:1")),
+        IOStandard("LVCMOS33")
+    )
+]
+
+
 class Platform(LatticePlatform):
     default_clk_name = "clk16"
     default_clk_period = 62.5