soc_core: remove add_cpu method (when no real CPU but only wishbone masters, self.cpu is declared as CPUNone)
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@ -169,8 +169,8 @@ class SoCCore(Module):
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# Check type
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# Check type
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if cpu_type not in cpu.CPUS.keys():
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if cpu_type not in cpu.CPUS.keys():
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raise ValueError("Unsupported CPU type: {}".format(cpu_type))
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raise ValueError("Unsupported CPU type: {}".format(cpu_type))
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# Add the CPU
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# Declare the CPU
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self.add_cpu(cpu.CPUS[cpu_type](platform, self.cpu_variant))
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self.submodules.cpu = cpu.CPUS[cpu_type](platform, self.cpu_variant)
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# Update Memory Map (if defined by CPU)
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# Update Memory Map (if defined by CPU)
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self.soc_mem_map.update(self.cpu.mem_map)
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self.soc_mem_map.update(self.cpu.mem_map)
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@ -200,7 +200,7 @@ class SoCCore(Module):
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if with_ctrl:
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if with_ctrl:
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self.comb += self.cpu.reset.eq(self.ctrl.reset)
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self.comb += self.cpu.reset.eq(self.ctrl.reset)
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else:
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else:
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self.add_cpu(cpu.CPUNone())
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self.submodules.cpu = cpu.CPUNone()
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self.soc_io_regions.update(self.cpu.io_regions)
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self.soc_io_regions.update(self.cpu.io_regions)
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# Add user's interrupts (needs to be done after CPU interrupts are allocated)
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# Add user's interrupts (needs to be done after CPU interrupts are allocated)
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@ -270,13 +270,6 @@ class SoCCore(Module):
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# Methods --------------------------------------------------------------------------------------
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# Methods --------------------------------------------------------------------------------------
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def add_cpu(self, cpu):
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if self.finalized:
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raise FinalizeError
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if hasattr(self, "cpu"):
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raise NotImplementedError("More than one CPU is not supported")
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self.submodules.cpu = cpu
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def add_interrupt(self, interrupt_name, interrupt_id=None, allow_user_defined=False):
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def add_interrupt(self, interrupt_name, interrupt_id=None, allow_user_defined=False):
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# Check that interrupt_name is not already used
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# Check that interrupt_name is not already used
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if interrupt_name in self.soc_interrupt_map.keys():
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if interrupt_name in self.soc_interrupt_map.keys():
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@ -456,7 +449,7 @@ class SoCCore(Module):
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def do_finalize(self):
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def do_finalize(self):
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# Verify CPU has required memories
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# Verify CPU has required memories
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if self.cpu_type is not None:
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if not isinstance(self.cpu, cpu.CPUNone):
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for name in ["rom", "sram"]:
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for name in ["rom", "sram"]:
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if name not in self.mem_regions.keys():
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if name not in self.mem_regions.keys():
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raise FinalizeError("CPU needs \"{}\" to be defined as memory or linker region".format(name))
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raise FinalizeError("CPU needs \"{}\" to be defined as memory or linker region".format(name))
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@ -504,7 +497,6 @@ class SoCCore(Module):
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self.add_constant("CONFIG_" + name.upper() + "_" + value)
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self.add_constant("CONFIG_" + name.upper() + "_" + value)
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# Connect interrupts
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# Connect interrupts
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if hasattr(self, "cpu"):
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if hasattr(self.cpu, "interrupt"):
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if hasattr(self.cpu, "interrupt"):
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for _name, _id in sorted(self.soc_interrupt_map.items()):
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for _name, _id in sorted(self.soc_interrupt_map.items()):
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if _name in self.cpu.interrupts.keys():
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if _name in self.cpu.interrupts.keys():
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