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integration/builder: Add LiteX define to generated variables (to distinguish MiSoC and LiteX).
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litex/soc/integration/builder.py
Normal file → Executable file
2
litex/soc/integration/builder.py
Normal file → Executable file
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@ -70,6 +70,8 @@ class Builder:
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variables_contents.append("{}={}\n".format(k, _makefile_escape(v)))
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variables_contents.append("{}={}\n".format(k, _makefile_escape(v)))
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for k, v in cpu_interface.get_cpu_mak(self.soc.cpu):
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for k, v in cpu_interface.get_cpu_mak(self.soc.cpu):
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define(k, v)
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define(k, v)
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# Distinguish between LiteX and MiSoC.
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define("LITEX", "1")
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# Distinguish between applications running from main RAM and
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# Distinguish between applications running from main RAM and
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# flash for user-provided software packages.
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# flash for user-provided software packages.
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if "main_ram" in (m[0] for m in memory_regions):
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if "main_ram" in (m[0] for m in memory_regions):
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