integration/builder: Add LiteX define to generated variables (to distinguish MiSoC and LiteX).

This commit is contained in:
William D. Jones 2018-09-24 11:04:57 -04:00
parent 70a32ed86f
commit db90619067

2
litex/soc/integration/builder.py Normal file → Executable file
View file

@ -70,6 +70,8 @@ class Builder:
variables_contents.append("{}={}\n".format(k, _makefile_escape(v))) variables_contents.append("{}={}\n".format(k, _makefile_escape(v)))
for k, v in cpu_interface.get_cpu_mak(self.soc.cpu): for k, v in cpu_interface.get_cpu_mak(self.soc.cpu):
define(k, v) define(k, v)
# Distinguish between LiteX and MiSoC.
define("LITEX", "1")
# Distinguish between applications running from main RAM and # Distinguish between applications running from main RAM and
# flash for user-provided software packages. # flash for user-provided software packages.
if "main_ram" in (m[0] for m in memory_regions): if "main_ram" in (m[0] for m in memory_regions):