CHANGES.md: Update.
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- soc : Fixed AHB2Wishbone bridge creation (#1998).
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- soc : Fixed parameters propagation for AXI data-width conversion (#1997).
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- soc/cores/clock/colognechip : Fixed and reworked locked signal handling.
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- litesdcard : Fixed data_i sampling (https://github.com/enjoy-digital/litesdcard/pull/34).
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[> Added
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--------
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