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liblitedram/sdram_leveling_center_module: Do a check after final delay configuration.

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On ECP5/DDR3, final configuration does not seem to be done correctly each time.
Add a retry/check mechanism to workaround the issue for now.
This commit is contained in:
Florent Kermarrec 2022-03-22 17:12:13 +01:00
parent 153f9f3660
commit dd7a04a5c0
1 changed files with 20 additions and 7 deletions
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27
litex/soc/software/liblitedram/sdram.c
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@ -435,7 +435,7 @@ static void sdram_leveling_center_module(
if (show_long)
printf("| ");
delay_mid = (delay_min+delay_max)/2 % SDRAM_PHY_DELAYS;
delay_mid = (delay_min+delay_max)/2 % SDRAM_PHY_DELAYS;
delay_range = (delay_max-delay_min)/2;
if (show_short) {
if (delay_min < 0)
@ -447,12 +447,25 @@ static void sdram_leveling_center_module(
if (show_long)
printf("\n");
/* Set delay to the middle */
rst_delay(module);
cdelay(100);
for(i = 0; i < delay_mid; i++) {
inc_delay(module);
cdelay(100);
/* Set delay to the middle and check */
if (delay_min >= 0) {
int retries = 8; /* Do N configs/checks and give up if failing */
while (retries > 0) {
/* Set delay. */
rst_delay(module);
cdelay(100);
for(i = 0; i < delay_mid; i++) {
inc_delay(module);
cdelay(100);
}
/* Check */
errors = sdram_write_read_check_test_pattern(module, 42);
errors += sdram_write_read_check_test_pattern(module, 84);
if (errors == 0)
break;
retries--;
}
}
}