integration/soc/add_sdcard: remove sdclk.
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@ -1264,16 +1264,6 @@ class LiteXSoC(SoC):
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else:
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sdcard_pads = self.platform.request(name)
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# Clocking
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if self.platform.device[:3] == "xc7":
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from litesdcard.clocker import SDClockerS7
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self.submodules.sdclk = SDClockerS7(sys_clk_freq=self.sys_clk_freq)
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self.add_csr("sdclk")
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else:
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from litesdcard.clocker import SDClockerGen
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self.submodules.sdclk = SDClockerGen()
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self.add_csr("sdclk")
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# Core
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if hasattr(sdcard_pads, "rst"):
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self.comb += sdcard_pads.rst.eq(0)
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@ -1302,9 +1292,4 @@ class LiteXSoC(SoC):
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# Timing constraints
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if not with_emulator:
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self.platform.add_period_constraint(self.sdclk.cd_sd.clk, 1e9/self.sys_clk_freq)
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self.platform.add_period_constraint(self.sdclk.cd_sd_fb.clk, 1e9/self.sys_clk_freq)
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self.platform.add_false_path_constraints(
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self.crg.cd_sys.clk,
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self.sdclk.cd_sd.clk,
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self.sdclk.cd_sd_fb.clk)
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self.platform.add_false_path_constraints(self.crg.cd_sys.clk, self.crg.cd_sdcard.clk)
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