mibuild/lattice: use ODDRXD1 and new synthesis directive

This commit is contained in:
Florent Kermarrec 2015-03-17 14:59:36 +01:00
parent b7d7fe1a4c
commit e07b7f632c
1 changed files with 5 additions and 2 deletions

View File

@ -1,6 +1,8 @@
from migen.fhdl.std import * from migen.fhdl.std import *
from migen.genlib.io import * from migen.genlib.io import *
from migen.genlib.resetsync import AsyncResetSynchronizer
class LatticeAsyncResetSynchronizerImpl(Module): class LatticeAsyncResetSynchronizerImpl(Module):
def __init__(self, cd, async_reset): def __init__(self, cd, async_reset):
rst1 = Signal() rst1 = Signal()
@ -18,8 +20,9 @@ class LatticeAsyncResetSynchronizer:
class LatticeDDROutputImpl(Module): class LatticeDDROutputImpl(Module):
def __init__(self, i1, i2, o, clk): def __init__(self, i1, i2, o, clk):
self.specials += Instance("ODDRA", self.specials += Instance("ODDRXD1",
i_CLK=clk, i_RST=0, synthesis_directive="ODDRAPPS=\"SCLK_ALIGNED\"",
i_SCLK=clk,
i_DA=i1, i_DB=i2, o_Q=o, i_DA=i1, i_DB=i2, o_Q=o,
) )