targets/simple: use XIP from SPI flash

This commit is contained in:
Sebastien Bourdeauducq 2014-02-14 15:48:15 +01:00
parent bdb47e7977
commit e4273be517
1 changed files with 4 additions and 6 deletions

View File

@ -1,14 +1,13 @@
from migen.fhdl.std import * from migen.fhdl.std import *
from misoclib import gpio, spiflash from misoclib import gpio, spiflash
from misoclib.gensoc import GenSoC, IntegratedBIOS from misoclib.gensoc import GenSoC
class SimpleSoC(GenSoC, IntegratedBIOS): class SimpleSoC(GenSoC):
def __init__(self, platform): def __init__(self, platform):
GenSoC.__init__(self, platform, GenSoC.__init__(self, platform,
clk_freq=32*1000000, clk_freq=32*1000000,
cpu_reset_address=0) cpu_reset_address=0x60000)
IntegratedBIOS.__init__(self)
# We can't use reset_less as LM32 does require a reset signal # We can't use reset_less as LM32 does require a reset signal
self.clock_domains.cd_sys = ClockDomain() self.clock_domains.cd_sys = ClockDomain()
@ -17,10 +16,9 @@ class SimpleSoC(GenSoC, IntegratedBIOS):
self.submodules.leds = gpio.GPIOOut(platform.request("user_led")) self.submodules.leds = gpio.GPIOOut(platform.request("user_led"))
# Map the SPI flash at 0xb0000000 for demo purposes. Later, we'll want to store the BIOS there.
self.submodules.spiflash = spiflash.SpiFlash(platform.request("spiflash2x"), self.submodules.spiflash = spiflash.SpiFlash(platform.request("spiflash2x"),
cmd=0xefef, cmd_width=16, addr_width=24, dummy=4) cmd=0xefef, cmd_width=16, addr_width=24, dummy=4)
self.add_wb_slave(lambda a: a[26:29] == 3, self.spiflash.bus) self.register_rom(self.spiflash.bus)
def get_default_subtarget(platform): def get_default_subtarget(platform):
return SimpleSoC return SimpleSoC