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soc_core: fix cpu_variant renaming regression

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This commit is contained in:
Florent Kermarrec 2020-02-13 08:34:16 +01:00
parent a2f1683b97
commit e4712ff7f3
1 changed files with 3 additions and 3 deletions
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6
litex/soc/integration/soc_core.py
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@ -120,14 +120,14 @@ class SoCCore(LiteXSoC):
self.config = {}
# Parameters management --------------------------------------------------------------------
if cpu_type == "None":
cpu_type = None
cpu_type = None if cpu_type == "None" else cpu_type
cpu_variant = cpu.check_format_cpu_variant(cpu_variant)
if not with_wishbone:
self.mem_map["csr"] = 0x00000000
self.cpu_type = cpu_type
self.cpu_variant = cpu.check_format_cpu_variant(cpu_variant)
self.cpu_variant = cpu_variant
self.integrated_rom_size = integrated_rom_size
self.integrated_rom_initialized = integrated_rom_init != []