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litei2c: add to litex
add litei2c to litex. Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
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2 changed files with 13 additions and 0 deletions
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@ -2049,6 +2049,18 @@ class LiteXSoC(SoC):
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add_ip_address_constants(self, "REMOTEIP", ethmac_remote_ip)
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add_ip_address_constants(self, "REMOTEIP", ethmac_remote_ip)
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add_mac_address_constants(self, "MACADDR", ethmac_address)
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add_mac_address_constants(self, "MACADDR", ethmac_address)
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# Add I2C Master -------------------------------------------------------------------------------
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def add_i2c_master(self, name="i2cmaster", pads=None, **kwargs):
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# Imports.
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from litei2c import LiteI2C
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# Core.
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self.check_if_exists(name)
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if pads is None:
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pads = self.platform.request(name)
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i2c = LiteI2C(self.sys_clk_freq, pads=pads, **kwargs)
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self.add_module(name=name, module=i2c)
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# Add SPI Master --------------------------------------------------------------------------------
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# Add SPI Master --------------------------------------------------------------------------------
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def add_spi_master(self, name="spimaster", pads=None, data_width=8, spi_clk_freq=1e6, with_clk_divider=True, **kwargs):
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def add_spi_master(self, name="spimaster", pads=None, data_width=8, spi_clk_freq=1e6, with_clk_divider=True, **kwargs):
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# Imports.
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# Imports.
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@ -89,6 +89,7 @@ git_repos = {
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"litescope": GitRepo(url="https://github.com/enjoy-digital/", tag=True),
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"litescope": GitRepo(url="https://github.com/enjoy-digital/", tag=True),
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"litejesd204b": GitRepo(url="https://github.com/enjoy-digital/", tag=True),
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"litejesd204b": GitRepo(url="https://github.com/enjoy-digital/", tag=True),
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"litespi": GitRepo(url="https://github.com/litex-hub/", tag=True),
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"litespi": GitRepo(url="https://github.com/litex-hub/", tag=True),
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"litei2c": GitRepo(url="https://github.com/litex-hub/", tag=True, branch="main"),
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# LiteX Misc Cores.
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# LiteX Misc Cores.
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# -----------------
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# -----------------
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