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README: update Intro

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Florent Kermarrec 2019-06-24 09:59:10 +02:00
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[> Intro [> Intro
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LiteX is a FPGA design/SoC builder that can be used to build cores, create LiteX is a MiSoC-based SoC builder using Migen as Python DSL that can be used
SoCs and full FPGA designs. to create SoCs and full FPGA designs.
LiteX is based on Migen and provides specific building/debugging tools for LiteX provides specific building/debugging tools for high level of abstraction
a higher level of abstraction and compatibily with the LiteX core ecosystem. and compatibily with the LiteX core ecosystem.
Think of Migen as a toolbox to create FPGA designs in Python and LiteX as a Think of Migen as a toolbox to create FPGA designs in Python and LiteX as a
toolbox to create/develop/debug FPGA SoCs in Python. toolbox to create/develop/debug FPGA SoCs in Python.