soc_core: cleanup/re-align

2019-09-29 17:31:37 +02:00 · 2019-09-29 17:31:37 +02:00 · e8e57b4f87
parent 334ae336bf
commit e8e57b4f87
1 changed files with 19 additions and 18 deletions
--- a/litex/soc/integration/soc_core.py
+++ b/litex/soc/integration/soc_core.py
@ -434,7 +434,8 @@ class SoCCore(Module):
            self.get_csr_dev_address,
            data_width    = self.csr_data_width,
            address_width = self.csr_address_width,
-            alignment=self.csr_alignment)
+            alignment     = self.csr_alignment
+        )

        # Add CSRs interconnect
        if len(self._csr_masters) != 0: