README: update copyright year and make sure LICENSE/README both mention MiSoC
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LICENSE
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LICENSE
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@ -1,6 +1,10 @@
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LiteX is a MiSoC-based SoC builder using Migen as Python DSL.
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LiteX is a FPGA design/SoC builder that can be used to build cores, create
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SoCs and full FPGA designs.
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Unless otherwise noted, LiteX is copyright (C) 2012-2019 Enjoy-Digital.
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LiteX is based on Migen/MiSoC and provides specific building/debugging tools
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for a higher level of abstraction and compatibily with the LiteX core ecosystem.
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Unless otherwise noted, LiteX is copyright (C) 2012-2020 Enjoy-Digital.
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Unless otherwise noted, MiSoC is copyright (C) 2012-2015 Enjoy-Digital.
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Unless otherwise noted, MiSoC is copyright (C) 2007-2015 M-Labs Ltd.
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All rights reserved.
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![LiteX](https://raw.githubusercontent.com/enjoy-digital/litex/master/doc/litex.png)
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```
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Copyright 2012-2019 / EnjoyDigital
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Copyright 2012-2020 / EnjoyDigital
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```
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[![](https://travis-ci.com/enjoy-digital/litex.svg?branch=master)](https://travis-ci.com/enjoy-digital/litex)
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![License](https://img.shields.io/badge/License-BSD%202--Clause-orange.svg)
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@ -8,8 +8,8 @@
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LiteX is a FPGA design/SoC builder that can be used to build cores, create
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SoCs and full FPGA designs.
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LiteX is based on Migen and provides specific building/debugging tools for
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a higher level of abstraction and compatibily with the LiteX core ecosystem.
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LiteX is based on Migen/MiSoC and provides specific building/debugging tools
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for a higher level of abstraction and compatibily with the LiteX core ecosystem.
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Think of Migen as a toolbox to create FPGA designs in Python and LiteX as a
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SoC builder to create/develop/debug FPGA SoCs in Python.
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@ -567,7 +567,7 @@ int main(int i, char **c)
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printf("\e[1m / /__/ / __/ -_)> <\e[0m\n");
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printf("\e[1m /____/_/\\__/\\__/_/|_|\e[0m\n");
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printf("\n");
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printf(" (c) Copyright 2012-2019 Enjoy-Digital\n");
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printf(" (c) Copyright 2012-2020 Enjoy-Digital\n");
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printf("\n");
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printf(" BIOS built on "__DATE__" "__TIME__"\n");
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crcbios();
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