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mixxeo: swap pairs 0 and 1 on DVI1

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This commit is contained in:
Sebastien Bourdeauducq 2013-09-14 19:36:02 +02:00
parent d57344b8ae
commit ebe8a27de9
1 changed files with 4 additions and 4 deletions
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8
mibuild/platforms/mixxeo.py
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@ -101,10 +101,10 @@ _io = [
("dvi_in", 1, ("dvi_in", 1,
Subsignal("clk_p", Pins("C11"), IOStandard("TMDS_33")), Subsignal("clk_p", Pins("C11"), IOStandard("TMDS_33")),
Subsignal("clk_n", Pins("A11"), IOStandard("TMDS_33")), Subsignal("clk_n", Pins("A11"), IOStandard("TMDS_33")),
Subsignal("data0_p", Pins("C17"), IOStandard("TMDS_33")), Subsignal("data0_p", Pins("B18"), IOStandard("TMDS_33")),
Subsignal("data0_n", Pins("A17"), IOStandard("TMDS_33")), Subsignal("data0_n", Pins("A18"), IOStandard("TMDS_33")),
Subsignal("data1_p", Pins("B18"), IOStandard("TMDS_33")), Subsignal("data1_p", Pins("C17"), IOStandard("TMDS_33")),
Subsignal("data1_n", Pins("A18"), IOStandard("TMDS_33")), Subsignal("data1_n", Pins("A17"), IOStandard("TMDS_33")),
Subsignal("data2_p", Pins("E16"), IOStandard("TMDS_33")), Subsignal("data2_p", Pins("E16"), IOStandard("TMDS_33")),
Subsignal("data2_n", Pins("D17"), IOStandard("TMDS_33")), Subsignal("data2_n", Pins("D17"), IOStandard("TMDS_33")),
Subsignal("scl", Pins("F17"), IOStandard("LVCMOS33")), Subsignal("scl", Pins("F17"), IOStandard("LVCMOS33")),