build/xilinx/vivado: Allow passing str to add_false_path_constraint to allow mising Signals and str and simplify design constraints.
This commit is contained in:
parent
4e775a7bd6
commit
ec06bf5955
|
@ -217,13 +217,26 @@ class XilinxVivadoToolchain(GenericToolchain):
|
||||||
False: "nets",
|
False: "nets",
|
||||||
True: "ports",
|
True: "ports",
|
||||||
}[hasattr(clk, "port")]
|
}[hasattr(clk, "port")]
|
||||||
for _from, _to in sorted(self.false_paths, key=lambda x: (x[0].duid, x[1].duid)):
|
|
||||||
|
for _from, _to in sorted(self.false_paths, key=lambda x: (str(x[0]), str(x[1]))):
|
||||||
|
if isinstance(_from, str):
|
||||||
|
_from_cmd = f"[get_clocks {_from}]"
|
||||||
|
else:
|
||||||
|
_from_cmd = f"[get_clocks -include_generated_clocks -of [get_{get_clk_type(_from)} {{_from}}]]"
|
||||||
|
|
||||||
|
if isinstance(_to, str):
|
||||||
|
_to_cmd = f"[get_clocks {_to}]"
|
||||||
|
else:
|
||||||
|
_to_cmd = f"[get_clocks -include_generated_clocks -of [get_{get_clk_type(_to)} {{_to}}]]"
|
||||||
|
|
||||||
self.platform.add_platform_command(
|
self.platform.add_platform_command(
|
||||||
"set_clock_groups "
|
"set_clock_groups "
|
||||||
"-group [get_clocks -include_generated_clocks -of [get_" + get_clk_type(_from) + " {_from}]] "
|
f"-group {_from_cmd} "
|
||||||
"-group [get_clocks -include_generated_clocks -of [get_" + get_clk_type(_to) + " {_to}]] "
|
f"-group {_to_cmd} "
|
||||||
"-asynchronous",
|
"-asynchronous",
|
||||||
_from=_from, _to=_to)
|
_from = _from if not isinstance(_from, str) else None,
|
||||||
|
_to = _to if not isinstance(_to, str) else None,
|
||||||
|
)
|
||||||
|
|
||||||
# Clear false path constraints after generation.
|
# Clear false path constraints after generation.
|
||||||
self.false_paths.clear()
|
self.false_paths.clear()
|
||||||
|
|
Loading…
Reference in New Issue