targets/nexys4ddr: use LiteXSoC's add_spi_sdcard method.
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@ -25,8 +25,6 @@ from litesdcard.core import SDCore
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from litesdcard.bist import BISTBlockGenerator, BISTBlockChecker
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from litex.soc.cores.timer import Timer
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from litex.soc.cores.spi import SPIMaster
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# CRG ----------------------------------------------------------------------------------------------
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class _CRG(Module):
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@ -87,13 +85,6 @@ class BaseSoC(SoCCore):
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self.add_csr("ethphy")
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self.add_ethernet(phy=self.ethphy)
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def add_spisdcard(self):
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spisdcard_pads = self.platform.request("spisdcard")
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if hasattr(spisdcard_pads, "rst"):
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self.comb += spisdcard_pads.rst.eq(0)
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self.submodules.spisdcard = SPIMaster(spisdcard_pads, 8, self.sys_clk_freq, 400e3)
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self.add_csr("spisdcard")
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def add_sdcard(self):
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sdcard_pads = self.platform.request("sdcard")
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if hasattr(sdcard_pads, "rst"):
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@ -142,7 +133,7 @@ def main():
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with_ethernet=args.with_ethernet,
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**soc_sdram_argdict(args))
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if args.with_spi_sdcard:
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soc.add_spisdcard()
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soc.add_spi_sdcard()
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if args.with_sdcard:
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if args.with_spi_sdcard:
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raise ValueError("'--with-spi-sdcard' and '--with-sdcard' are mutually exclusive!")
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