litex/soc/software/liblitespi: fix names associated with PHY CSRs
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fb4b6c35a3
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eceee7e4c4
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@ -12,7 +12,7 @@
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#include "spiflash.h"
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#ifdef CSR_SPIFLASH_MMAP_BASE
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#if defined(CSR_SPIFLASH_PHY_BASE) && defined(CSR_SPIFLASH_MMAP_BASE)
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#define DEBUG 0
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#define USER_DEFINED_DUMMY_BITS 0
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@ -29,7 +29,7 @@ static void spi_set_mode(spi_mode mode)
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int spiflash_freq_init(void)
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{
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unsigned int lowest_div = spiflash_mmap_clk_divisor_read();
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unsigned int lowest_div = spiflash_phy_clk_divisor_read();
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unsigned int crc = crc32((unsigned char *)SPIFLASH_BASE, SPI_FLASH_BLOCK_SIZE);
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unsigned int crc_test = crc;
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@ -49,7 +49,7 @@ int spiflash_freq_init(void)
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for(int i = lowest_div; (crc == crc_test) && (i >= 0); i--) {
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lowest_div = i;
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spiflash_mmap_clk_divisor_write((uint32_t)i);
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spiflash_phy_clk_divisor_write((uint32_t)i);
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crc_test = crc32((unsigned char *)SPIFLASH_BASE, SPI_FLASH_BLOCK_SIZE);
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#if DEBUG
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printf("[DIV: %d] %08x\n\r", i, crc_test);
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@ -58,14 +58,14 @@ int spiflash_freq_init(void)
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lowest_div++;
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printf("SPIFlash freq configured to %d MHz\n", (spiflash_mmap_sys_clk_freq_read()/(2*(1 + lowest_div)))/1000000);
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spiflash_mmap_clk_divisor_write(lowest_div);
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spiflash_phy_clk_divisor_write(lowest_div);
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return 0;
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}
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void spiflash_dummy_bits_setup(unsigned int dummy_bits)
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{
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spiflash_mmap_dummy_bits_write((uint32_t)dummy_bits);
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spiflash_phy_dummy_bits_write((uint32_t)dummy_bits);
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#if DEBUG
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printf("Dummy bits set to: %d\n\r", spi_dummy_bits_read());
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#endif
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